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Commit c314c8f9 authored by Reinier van der Walle's avatar Reinier van der Walle
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added the technology type to hdllibs of eth_10g

parent bcca32a0
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...@@ -2,7 +2,7 @@ hdl_lib_name = ip_arria10_eth_10g ...@@ -2,7 +2,7 @@ hdl_lib_name = ip_arria10_eth_10g
hdl_library_clause_name = ip_arria10_eth_10g_lib hdl_library_clause_name = ip_arria10_eth_10g_lib
hdl_lib_uses_synth = technology tech_pll tech_mac_10g tech_10gbase_r common dp hdl_lib_uses_synth = technology tech_pll tech_mac_10g tech_10gbase_r common dp
hdl_lib_uses_sim = hdl_lib_uses_sim =
hdl_lib_technology = hdl_lib_technology = ip_arria10
synth_files = synth_files =
ip_arria10_eth_10g.vhd ip_arria10_eth_10g.vhd
......
...@@ -2,7 +2,7 @@ hdl_lib_name = ip_arria10_e1sg_eth_10g ...@@ -2,7 +2,7 @@ hdl_lib_name = ip_arria10_e1sg_eth_10g
hdl_library_clause_name = ip_arria10_e1sg_eth_10g_lib hdl_library_clause_name = ip_arria10_e1sg_eth_10g_lib
hdl_lib_uses_synth = technology tech_pll tech_mac_10g tech_10gbase_r common dp hdl_lib_uses_synth = technology tech_pll tech_mac_10g tech_10gbase_r common dp
hdl_lib_uses_sim = hdl_lib_uses_sim =
hdl_lib_technology = hdl_lib_technology = ip_arria10_e1sg
synth_files = synth_files =
ip_arria10_e1sg_eth_10g.vhd ip_arria10_e1sg_eth_10g.vhd
......
...@@ -2,7 +2,7 @@ hdl_lib_name = ip_arria10_e3sge3_eth_10g ...@@ -2,7 +2,7 @@ hdl_lib_name = ip_arria10_e3sge3_eth_10g
hdl_library_clause_name = ip_arria10_e3sge3_eth_10g_lib hdl_library_clause_name = ip_arria10_e3sge3_eth_10g_lib
hdl_lib_uses_synth = technology tech_pll tech_mac_10g tech_10gbase_r common dp hdl_lib_uses_synth = technology tech_pll tech_mac_10g tech_10gbase_r common dp
hdl_lib_uses_sim = hdl_lib_uses_sim =
hdl_lib_technology = hdl_lib_technology = ip_arria10_e3sge3
synth_files = synth_files =
ip_arria10_e3sge3_eth_10g.vhd ip_arria10_e3sge3_eth_10g.vhd
......
...@@ -2,7 +2,7 @@ hdl_lib_name = ip_stratixiv_eth_10g ...@@ -2,7 +2,7 @@ hdl_lib_name = ip_stratixiv_eth_10g
hdl_library_clause_name = ip_stratixiv_eth_10g_lib hdl_library_clause_name = ip_stratixiv_eth_10g_lib
hdl_lib_uses_synth = technology tech_pll tech_mac_10g tech_10gbase_r tech_xaui common dp hdl_lib_uses_synth = technology tech_pll tech_mac_10g tech_10gbase_r tech_xaui common dp
hdl_lib_uses_sim = hdl_lib_uses_sim =
hdl_lib_technology = hdl_lib_technology = ip_stratixiv
synth_files = synth_files =
ip_stratixiv_eth_10g.vhd ip_stratixiv_eth_10g.vhd
......
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