-Removed references to non-existent DDR3 generic.

applications/apertif/designs/apertif_unb1_fn_beamformer/revisions/apertif_unb1_fn_beamformer_base/apertif_unb1_fn_beamformer_base.vhd

@@ -32,8 +32,7 @@ ENTITY apertif_unb1_fn_beamformer_base IS
     g_sim_node_nr : NATURAL := 0;
     g_stamp_date  : NATURAL := 0;
     g_stamp_time  : NATURAL := 0;
-    g_stamp_svn   : NATURAL := 0;
-    g_use_MB_I    : NATURAL := 0 
+    g_stamp_svn   : NATURAL := 0
   );
   PORT (
    -- GENERAL
@@ -87,9 +86,9 @@ ENTITY apertif_unb1_fn_beamformer_base IS
     SI_FN_3_CNTRL : INOUT STD_LOGIC_VECTOR(c_unb1_board_ci.tr.cntrl_w-1 DOWNTO 0);
     SI_FN_RSTN    : OUT   STD_LOGIC := '1'; -- ResetN is pulled up in the Vitesse chip, but pulled down again by external 1k resistor.
                                            -- So we need to assign a '1' to it.
-    MB_I_IN       : IN    t_tech_ddr3_phy_in_arr(g_use_MB_I-1 DOWNTO 0);     
-    MB_I_IO       : INOUT t_tech_ddr3_phy_io_arr(g_use_MB_I-1 DOWNTO 0); 
-    MB_I_OU       : OUT   t_tech_ddr3_phy_ou_arr(g_use_MB_I-1 DOWNTO 0) 
+    MB_I_IN       : IN    t_tech_ddr3_phy_in;     
+    MB_I_IO       : INOUT t_tech_ddr3_phy_io; 
+    MB_I_OU       : OUT   t_tech_ddr3_phy_ou 
   );
 END apertif_unb1_fn_beamformer_base;
 
@@ -106,8 +105,7 @@ BEGIN
     g_sim_node_nr => g_sim_node_nr,
     g_stamp_date  => g_stamp_date, 
     g_stamp_time  => g_stamp_time, 
-    g_stamp_svn   => g_stamp_svn,
-    g_use_MB_I    => g_use_MB_I  
+    g_stamp_svn   => g_stamp_svn
   )
   PORT MAP (
     CLK          => CLK,