Cosmetic: Added description. Use XGMII constants. Clarified line rate.

libraries/technology/xaui/sim_xaui.vhd

@@ -20,6 +20,14 @@
 --
 --------------------------------------------------------------------------------
 
+-- Purpose : Fast simulation model for 10G XGMII over 4 lanes XAUI
+-- Description :
+-- Remark :
+-- . The sim_xaui has the same entity ports and generics as tech_xaui
+--   so that it can directly be mapped in tech_xaui.
+-- . The model uses 10/8 overhead to transport the control signalling. All 4
+--   XAUI lanes are used. Therefore the line rate per lane is 3.125 Mbps.
+
 LIBRARY IEEE, common_lib, tech_transceiver_lib;
 USE IEEE.STD_LOGIC_1164.ALL;
 USE common_lib.common_pkg.ALL;
@@ -68,9 +76,9 @@ END sim_xaui;
 
 ARCHITECTURE wrap OF sim_xaui IS  
 
-  CONSTANT c_xaui_serdes_data_w    : NATURAL := 16;
-  CONSTANT c_xaui_serdes_ctrl_w    : NATURAL := c_xaui_serdes_data_w/c_byte_w;
-  CONSTANT c_xaui_serdes_line_rate : NATURAL := 3125;
+  CONSTANT c_xaui_serdes_data_w    : NATURAL := c_xgmii_data_w / c_nof_xaui_lanes;  -- = 16b = 64 b / 4
+  CONSTANT c_xaui_serdes_ctrl_w    : NATURAL := c_xgmii_ctrl_w / c_nof_xaui_lanes;  -- =  2b =  8 b / 4
+  CONSTANT c_xaui_serdes_line_rate : NATURAL := 3125;  -- Mbps = 156.25 MHz * 10/8 (encoding) * 64b (data width) / 4 (XAUI lanes)
 
   -- XGMII control bits (one for each XGMII lane):
   SIGNAL xgmii_tx_c_arr            : t_xgmii_c_arr(g_nof_xaui-1 DOWNTO 0);