Add requantization module after the tabs beamformer

applications/arts/designs/arts_unb1_sc4/src/vhdl/arts_unb1_sc4_processing.vhd

@@ -63,7 +63,8 @@ ENTITY arts_unb1_sc4_processing IS
     g_nof_blk_per_sync  : NATURAL := 800000;
     g_nof_fft_bins      : NATURAL := 32;
     g_input_data_w      : NATURAL := 8;
-    g_output_select     : NATURAL := c_output_iquv_iab_all;
+    g_output_select     : NATURAL := c_output_tab_iquv;
+--    g_output_select     : NATURAL := c_output_iquv_iab_all;
     g_use_db            : BOOLEAN := TRUE
   );
   PORT (
@@ -319,12 +320,12 @@ BEGIN
       END LOOP;
     END PROCESS;
 
-    u_diag_data_buf_wpfbin : ENTITY diag_lib.mms_diag_data_buffer
+    u_diag_data_buf_wpfbin : ENTITY diag_lib.mms_diag_data_buffer_dev
     GENERIC MAP (
       g_nof_streams  => g_nof_telescopes, -- 12
       g_data_w       => c_db_data_w,        -- 16b (complex, 2*8b)
       g_buf_nof_data => c_db_nof_data_words,-- 256
-      g_buf_use_sync => FALSE,
+      g_buf_use_sync => TRUE,
       g_data_type    => e_complex
     )
     PORT MAP (
@@ -342,7 +343,7 @@ BEGIN
       in_sosi_arr       => diag_data_buf_wpfbin_snk_in_arr
     );
 
-    u_diag_data_buf_wbfbout : ENTITY diag_lib.mms_diag_data_buffer
+    u_diag_data_buf_wbfbout : ENTITY diag_lib.mms_diag_data_buffer_dev
     GENERIC MAP (
       g_nof_streams  => g_nof_telescopes,   -- 12
       g_data_w       => c_db_data_w*2,      -- 32b (complex, 2*12b rounded up to 16)
@@ -401,12 +402,13 @@ BEGIN
   -------------------------------------------------------------------------------
   u_arts_tab_beamformer : ENTITY arts_tab_beamformer_lib.arts_tab_beamformer
   GENERIC MAP (
+    g_sim          => g_sim,
     g_nof_inputs   => g_nof_telescopes,
     g_nof_tabs     => g_nof_tabs,
     g_nof_beamlets => g_nof_beamlets,
     g_data_w       => c_wpfb_out_dat_w,
-    g_weights_w    => 6,
-    g_weights_ram_dual_port => FALSE
+    g_weights_w    => 9, --6,
+    g_weights_ram_dual_port => TRUE --FALSE
   )
   PORT MAP (
     dp_clk      => dp_clk,
@@ -446,7 +448,7 @@ BEGIN
       v_out      => iquv_v_out_arr(i)
     );
 
-    iquv_src_out_arr(i).valid <= iquv_iab_i_out.valid;
+    iquv_src_out_arr(i).valid <= iquv_i_out_arr(0).valid; --iquv_iab_i_out.valid;
     iquv_src_out_arr(i).data(4*c_out_data_w_iquv-1 downto 0) <= iquv_v_out_arr(i).data(c_out_data_w_iquv-1 downto 0)
                                                               & iquv_u_out_arr(i).data(c_out_data_w_iquv-1 downto 0)
                                                               & iquv_q_out_arr(i).data(c_out_data_w_iquv-1 downto 0)

applications/arts/libraries/arts_tab_beamformer/src/vhdl/arts_tab_beamformer.vhd

@@ -50,6 +50,7 @@ ENTITY arts_tab_beamformer IS
     g_nof_beamlets          : NATURAL := 88; --88 beamlets per FPGA (704 per UniBoard) in 8b mode
     g_data_w                : NATURAL := 8;  --8b complex input data
     g_weights_w             : NATURAL := 16;
+    g_out_data_w            : NATURAL := 12;
     g_weights_ram_dual_port : BOOLEAN := TRUE;
     g_weights_file          : STRING  := "hex/beamformer_weights"
   );
@@ -79,6 +80,12 @@ ARCHITECTURE str OF arts_tab_beamformer IS
   CONSTANT c_nof_samples_per_beamlet : NATURAL := sel_a_b(g_sim, 100, 800000);
   CONSTANT c_nof_pols                : NATURAL := 2;                           
 
+--  CONSTANT c_bf_out_w             : NATURAL := g_weights_w + g_data_w + 1 + ceil_log2(g_nof_inputs); -- Add 1 for complex mult
+  CONSTANT c_bf_out_w             : NATURAL := g_weights_w + g_data_w + 1 - 9; -- Add 1 for complex mult, reduce the weights as number of telescopes increases. 
+                                                                               -- -8 or -10 is just a test to see if there is any signal there.
+  CONSTANT c_lsb_w                : NATURAL := c_bf_out_w - g_out_data_w;
+--  CONSTANT c_lsb_w                : NATURAL := 1;
+
   SIGNAL dp_counter_count_src_out_arr : t_dp_sosi_arr(c_nof_counts-1 DOWNTO 0);
   SIGNAL dp_counter_src_out           : t_dp_sosi;
 
@@ -89,6 +96,7 @@ ARCHITECTURE str OF arts_tab_beamformer IS
 
   SIGNAL weight_addr     : STD_LOGIC_VECTOR(ceil_log2(c_nof_weights)-1 DOWNTO 0);
 
+  SIGNAL beamformer_src_out_arr       : t_dp_sosi_arr(g_nof_tabs-1 DOWNTO 0);
   SIGNAL ram_miso_arr    : t_mem_miso_arr(g_nof_tabs-1 DOWNTO 0);
   SIGNAL ram_mosi_arr    : t_mem_mosi_arr(g_nof_tabs-1 DOWNTO 0); -- MM interface to upload weights to RAM
 
@@ -178,8 +186,36 @@ BEGIN
       weight_addr => weight_addr,
   
       snk_in_arr  => snk_in_arr,
-      src_out     => src_out_arr(i)
+      src_out     => beamformer_src_out_arr(i)
+    );
+
+    ------------------------------------------------------------------------------
+    -- Requantize the outputs to the desired bit width
+    ------------------------------------------------------------------------------
+    u_dp_requantize : ENTITY dp_lib.dp_requantize
+    GENERIC MAP (
+      g_complex             => TRUE,
+      g_representation      => "UNSIGNED",
+      g_lsb_w               => c_lsb_w-1,
+      g_lsb_round           => TRUE,
+      g_lsb_round_clip      => FALSE,
+      g_msb_clip            => TRUE,
+      g_msb_clip_symmetric  => FALSE,
+      g_gain_w              => 0,
+      g_pipeline_remove_lsb => 1,
+      g_pipeline_remove_msb => 0,
+      g_in_dat_w            => c_bf_out_w,
+      g_out_dat_w           => g_out_data_w
+    )
+    PORT MAP (
+      rst        => dp_rst,
+      clk        => dp_clk,
+      snk_in     => beamformer_src_out_arr(i),
+      src_out    => src_out_arr(i),
+      out_ovr    => OPEN
     );
+
   END GENERATE;
 
+
 END str;