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Commit bd57f7ce authored by Pepping's avatar Pepping
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- Chanhed definition of c_blocksize and c_pagesize

- CHanged comments
parent 37940f66
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......@@ -21,13 +21,13 @@
-------------------------------------------------------------------------------
--
-- Purpose: Testbench for the reorder_transpose unit
-- To be used in conjunction with python testscript: ../python/tc_transpose_ddr3.py
-- To be used in conjunction with python testscript: ../python/tc_reorder_transpose.py
--
--
-- Usage:
-- > as 8
-- > run -all
-- > run python script in separate terminal: "python tc_transpose_ddr3.py --unb 0 --fn 0 --sim"
-- > run python script in separate terminal: "python tc_reorder_transpose.py --unb 0 --fn 0 --sim"
-- > Stop the simulation manually in Modelsim by pressing the stop-button.
-- > Evalute the WAVE window.
......@@ -50,13 +50,13 @@ USE work.reorder_pkg.ALL;
ENTITY tb_reorder_transpose IS
GENERIC (
g_wr_chunksize : POSITIVE := 16;
g_rd_chunksize : POSITIVE := 4;
g_rd_nof_chunks : POSITIVE := 4;
g_rd_interval : POSITIVE := 4;
g_wr_chunksize : POSITIVE := 256;
g_rd_chunksize : POSITIVE := 16;
g_rd_nof_chunks : POSITIVE := 16;
g_rd_interval : POSITIVE := 16;
g_gapsize : NATURAL := 0;
g_nof_blocks : POSITIVE := 32;
g_nof_blk_per_sync : POSITIVE := 32;
g_nof_blocks : POSITIVE := 16;
g_nof_blk_per_sync : POSITIVE := 16;
g_nof_streams : POSITIVE := 4;
g_in_dat_w : POSITIVE := 8;
g_ena_pre_transp : BOOLEAN := TRUE
......@@ -137,8 +137,8 @@ ARCHITECTURE tb OF tb_reorder_transpose IS
CONSTANT c_tech_ddr : t_c_tech_ddr := c_tech_ddr3_4g_800m_master;
CONSTANT c_min_fifo_size : POSITIVE := 256;
CONSTANT c_blocksize : POSITIVE := c_reorder_seq.wr_chunksize + c_reorder_seq.gapsize;
CONSTANT c_pagesize : POSITIVE := c_reorder_seq.nof_blocks * c_blocksize;
CONSTANT c_blocksize : POSITIVE := g_wr_chunksize + g_gapsize;
CONSTANT c_pagesize : POSITIVE := g_nof_blocks * c_blocksize;
CONSTANT c_mem_size : POSITIVE := 2*c_pagesize;
CONSTANT c_mem_size_w : POSITIVE := ceil_log2(c_mem_size);
......
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