processed review comments

applications/lofar2/designs/lofar2_unb2b_sdp_station/hdllib.cfg

@@ -8,9 +8,9 @@ hdl_lib_include_ip =
                      ip_arria10_e1sg_pll_xgmii_mac_clocks
                      ip_arria10_e1sg_transceiver_pll_10g
                      ip_arria10_e1sg_phy_10gbase_r
-                     ip_arria10_e1sg_phy_10gbase_r_3
+                     ip_arria10_e1sg_phy_10gbase_r_12
                      ip_arria10_e1sg_transceiver_reset_controller_1
-                     ip_arria10_e1sg_transceiver_reset_controller_3
+                     ip_arria10_e1sg_transceiver_reset_controller_12
 
 synth_files =
     src/vhdl/qsys_lofar2_unb2b_sdp_station_pkg.vhd

applications/lofar2/designs/lofar2_unb2b_sdp_station/quartus/lofar2_unb2b_sdp_station_beamlets_pins.tcl

+###############################################################################
+#
+# Copyright (C) 2022
+# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+#
+###############################################################################
+#
+### QSFP_1_0 For BF
+set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to                   QSFP_1_RX[0]
+set_instance_assignment -name XCVR_A10_RX_TERM_SEL R_R1 -to                             QSFP_1_RX[0]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP5 RADP_DFE_FXTAP5_0 -to          QSFP_1_RX[0]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP4 RADP_DFE_FXTAP4_0 -to          QSFP_1_RX[0]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP1 RADP_DFE_FXTAP1_0 -to          QSFP_1_RX[0]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP7 RADP_DFE_FXTAP7_0 -to          QSFP_1_RX[0]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP6 RADP_DFE_FXTAP6_0 -to          QSFP_1_RX[0]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP3 RADP_DFE_FXTAP3_0 -to          QSFP_1_RX[0]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP2 RADP_DFE_FXTAP2_0 -to          QSFP_1_RX[0]
+set_instance_assignment -name XCVR_A10_RX_ONE_STAGE_ENABLE NON_S1_MODE -to              QSFP_1_RX[0]
+set_instance_assignment -name XCVR_A10_RX_ADP_CTLE_ACGAIN_4S RADP_CTLE_ACGAIN_4S_8 -to  QSFP_1_RX[0]
+set_instance_assignment -name XCVR_A10_RX_EQ_DC_GAIN_TRIM NO_DC_GAIN -to                QSFP_1_RX[0]
+set_instance_assignment -name XCVR_A10_RX_ADP_VGA_SEL RADP_VGA_SEL_5 -to                QSFP_1_RX[0]
+set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to                           QSFP_1_RX[0]
+
+set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to                   QSFP_1_TX[0]
+set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to                  QSFP_1_TX[0]
+set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to                           QSFP_1_TX[0]
+set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to                    QSFP_1_TX[0]
+set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to     QSFP_1_TX[0]
+set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to QSFP_1_TX[0]

applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_bf/hdllib.cfg

@@ -40,7 +40,7 @@ quartus_sdc_files =
     #$RADIOHDL_WORK/boards/uniboard2b/libraries/unb2b_board/quartus/unb2b_board.sdc
 
 quartus_tcl_files =
-    ../../quartus/lofar2_unb2b_sdp_station_pins.tcl
+    lofar2_unb2b_sdp_station_bf_pins.tcl
 
 quartus_vhdl_files = 
 

applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_bf/lofar2_unb2b_sdp_station_bf_pins.tcl

+###############################################################################
+#
+# Copyright (C) 2022
+# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+#
+###############################################################################
+source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2b_sdp_station/quartus/lofar2_unb2b_sdp_station_pins.tcl
+source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2b_sdp_station/quartus/lofar2_unb2b_sdp_station_beamlets_pins.tcl
+
+

applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_full/hdllib.cfg

@@ -36,7 +36,7 @@ quartus_sdc_files =
     #$RADIOHDL_WORK/boards/uniboard2b/libraries/unb2b_board/quartus/unb2b_board.sdc
 
 quartus_tcl_files =
-    ../../quartus/lofar2_unb2b_sdp_station_pins.tcl
+    lofar2_unb2b_sdp_station_full_pins.tcl
 
 quartus_vhdl_files = 
 

applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_full/lofar2_unb2b_sdp_station_full_pins.tcl

+###############################################################################
+#
+# Copyright (C) 2022
+# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+#
+###############################################################################
+source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2b_sdp_station/quartus/lofar2_unb2b_sdp_station_pins.tcl
+source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2b_sdp_station/quartus/lofar2_unb2b_sdp_station_ring_pins.tcl
+source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2b_sdp_station/quartus/lofar2_unb2b_sdp_station_beamlets_pins.tcl
+
+

applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_xsub_ring/hdllib.cfg

@@ -37,7 +37,7 @@ quartus_sdc_files =
     #$RADIOHDL_WORK/boards/uniboard2b/libraries/unb2b_board/quartus/unb2b_board.sdc
 
 quartus_tcl_files =
-    ../../quartus/lofar2_unb2b_sdp_station_pins.tcl
+    lofar2_unb2b_sdp_station_xsub_ring_pins.tcl
 
 quartus_vhdl_files = 
 

applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_xsub_ring/lofar2_unb2b_sdp_station_xsub_ring_pins.tcl

+###############################################################################
+#
+# Copyright (C) 2022
+# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+#
+###############################################################################
+source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2b_sdp_station/quartus/lofar2_unb2b_sdp_station_pins.tcl
+source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2b_sdp_station/quartus/lofar2_unb2b_sdp_station_ring_pins.tcl
+
+

applications/lofar2/designs/lofar2_unb2c_sdp_station/hdllib.cfg

@@ -8,9 +8,9 @@ hdl_lib_include_ip =
                      ip_arria10_e2sg_pll_xgmii_mac_clocks
                      ip_arria10_e2sg_transceiver_pll_10g
                      ip_arria10_e2sg_phy_10gbase_r
-                     ip_arria10_e2sg_phy_10gbase_r_3 
+                     ip_arria10_e2sg_phy_10gbase_r_12 
                      ip_arria10_e2sg_transceiver_reset_controller_1
-                     ip_arria10_e2sg_transceiver_reset_controller_3
+                     ip_arria10_e2sg_transceiver_reset_controller_12
 
 synth_files =
     src/vhdl/qsys_lofar2_unb2c_sdp_station_pkg.vhd

applications/lofar2/designs/lofar2_unb2c_sdp_station/quartus/lofar2_unb2c_sdp_station_beamlets_pins.tcl

+###############################################################################
+#
+# Copyright (C) 2022
+# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+#
+###############################################################################
+#
+### QSFP_1_0 For BF
+set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to                   QSFP_1_RX[0]
+set_instance_assignment -name XCVR_A10_RX_TERM_SEL R_R1 -to                             QSFP_1_RX[0]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP5 RADP_DFE_FXTAP5_0 -to          QSFP_1_RX[0]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP4 RADP_DFE_FXTAP4_0 -to          QSFP_1_RX[0]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP1 RADP_DFE_FXTAP1_0 -to          QSFP_1_RX[0]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP7 RADP_DFE_FXTAP7_0 -to          QSFP_1_RX[0]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP6 RADP_DFE_FXTAP6_0 -to          QSFP_1_RX[0]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP3 RADP_DFE_FXTAP3_0 -to          QSFP_1_RX[0]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP2 RADP_DFE_FXTAP2_0 -to          QSFP_1_RX[0]
+set_instance_assignment -name XCVR_A10_RX_ONE_STAGE_ENABLE NON_S1_MODE -to              QSFP_1_RX[0]
+set_instance_assignment -name XCVR_A10_RX_ADP_CTLE_ACGAIN_4S RADP_CTLE_ACGAIN_4S_8 -to  QSFP_1_RX[0]
+set_instance_assignment -name XCVR_A10_RX_EQ_DC_GAIN_TRIM NO_DC_GAIN -to                QSFP_1_RX[0]
+set_instance_assignment -name XCVR_A10_RX_ADP_VGA_SEL RADP_VGA_SEL_5 -to                QSFP_1_RX[0]
+set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to                           QSFP_1_RX[0]
+
+set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to                   QSFP_1_TX[0]
+set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to                  QSFP_1_TX[0]
+set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to                           QSFP_1_TX[0]
+set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to                    QSFP_1_TX[0]
+set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to     QSFP_1_TX[0]
+set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to QSFP_1_TX[0]

applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_bf/hdllib.cfg

@@ -41,7 +41,7 @@ quartus_sdc_files =
     #$RADIOHDL_WORK/boards/uniboard2c/libraries/unb2c_board/quartus/unb2c_board.sdc
 
 quartus_tcl_files =
-    ../../quartus/lofar2_unb2c_sdp_station_pins.tcl
+    lofar2_unb2c_sdp_station_bf_pins.tcl
 
 quartus_vhdl_files = 
 

applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_bf/lofar2_unb2c_sdp_station_bf_pins.tcl

+###############################################################################
+#
+# Copyright (C) 2022
+# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+#
+###############################################################################
+source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2c_sdp_station/quartus/lofar2_unb2c_sdp_station_pins.tcl
+source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2c_sdp_station/quartus/lofar2_unb2c_sdp_station_beamlets_pins.tcl
+
+

applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_full/lofar2_unb2c_sdp_station_full_pins.tcl

@@ -19,102 +19,7 @@
 #
 ###############################################################################
 source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2c_sdp_station/quartus/lofar2_unb2c_sdp_station_pins.tcl
-
-# Define extra pins for this revision.
-### QSFP_0_0 For ring
-set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to                  QSFP_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_TERM_SEL R_R1 -to                            QSFP_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP5 RADP_DFE_FXTAP5_0 -to         QSFP_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP4 RADP_DFE_FXTAP4_0 -to         QSFP_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP1 RADP_DFE_FXTAP1_0 -to         QSFP_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP7 RADP_DFE_FXTAP7_0 -to         QSFP_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP6 RADP_DFE_FXTAP6_0 -to         QSFP_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP3 RADP_DFE_FXTAP3_0 -to         QSFP_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP2 RADP_DFE_FXTAP2_0 -to         QSFP_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ONE_STAGE_ENABLE NON_S1_MODE -to             QSFP_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_CTLE_ACGAIN_4S RADP_CTLE_ACGAIN_4S_8 -to QSFP_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_EQ_DC_GAIN_TRIM NO_DC_GAIN -to               QSFP_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_VGA_SEL RADP_VGA_SEL_5 -to               QSFP_0_RX[0]
-set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to                          QSFP_0_RX[0]
-
-set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to                   QSFP_0_TX[0]
-set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to                  QSFP_0_TX[0]
-set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to                           QSFP_0_TX[0]
-set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to                    QSFP_0_TX[0]
-set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to     QSFP_0_TX[0]
-set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to QSFP_0_TX[0]
-
-### QSFP_1_0 For BF
-set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to                   QSFP_1_RX[0]
-set_instance_assignment -name XCVR_A10_RX_TERM_SEL R_R1 -to                             QSFP_1_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP5 RADP_DFE_FXTAP5_0 -to          QSFP_1_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP4 RADP_DFE_FXTAP4_0 -to          QSFP_1_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP1 RADP_DFE_FXTAP1_0 -to          QSFP_1_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP7 RADP_DFE_FXTAP7_0 -to          QSFP_1_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP6 RADP_DFE_FXTAP6_0 -to          QSFP_1_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP3 RADP_DFE_FXTAP3_0 -to          QSFP_1_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP2 RADP_DFE_FXTAP2_0 -to          QSFP_1_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ONE_STAGE_ENABLE NON_S1_MODE -to              QSFP_1_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_CTLE_ACGAIN_4S RADP_CTLE_ACGAIN_4S_8 -to  QSFP_1_RX[0]
-set_instance_assignment -name XCVR_A10_RX_EQ_DC_GAIN_TRIM NO_DC_GAIN -to                QSFP_1_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_VGA_SEL RADP_VGA_SEL_5 -to                QSFP_1_RX[0]
-set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to                           QSFP_1_RX[0]
-
-set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to                   QSFP_1_TX[0]
-set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to                  QSFP_1_TX[0]
-set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to                           QSFP_1_TX[0]
-set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to                    QSFP_1_TX[0]
-set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to     QSFP_1_TX[0]
-set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to QSFP_1_TX[0]
-
-
-#RING_0 RX assignments
-set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to                   RING_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_TERM_SEL R_R1 -to                             RING_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP5 RADP_DFE_FXTAP5_0 -to          RING_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP4 RADP_DFE_FXTAP4_0 -to          RING_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP1 RADP_DFE_FXTAP1_0 -to          RING_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP7 RADP_DFE_FXTAP7_0 -to          RING_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP6 RADP_DFE_FXTAP6_0 -to          RING_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP3 RADP_DFE_FXTAP3_0 -to          RING_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP2 RADP_DFE_FXTAP2_0 -to          RING_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ONE_STAGE_ENABLE NON_S1_MODE -to              RING_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_CTLE_ACGAIN_4S RADP_CTLE_ACGAIN_4S_12 -to RING_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_EQ_DC_GAIN_TRIM NO_DC_GAIN -to                RING_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_VGA_SEL RADP_VGA_SEL_3 -to                RING_0_RX[0]
-set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to                           RING_0_RX[0]
-
-#RING_1 RX assignments
-set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to                   RING_1_RX[0]
-set_instance_assignment -name XCVR_A10_RX_TERM_SEL R_R1 -to                             RING_1_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP5 RADP_DFE_FXTAP5_0 -to          RING_1_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP4 RADP_DFE_FXTAP4_0 -to          RING_1_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP1 RADP_DFE_FXTAP1_0 -to          RING_1_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP7 RADP_DFE_FXTAP7_0 -to          RING_1_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP6 RADP_DFE_FXTAP6_0 -to          RING_1_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP3 RADP_DFE_FXTAP3_0 -to          RING_1_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP2 RADP_DFE_FXTAP2_0 -to          RING_1_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ONE_STAGE_ENABLE NON_S1_MODE -to              RING_1_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_CTLE_ACGAIN_4S RADP_CTLE_ACGAIN_4S_12 -to RING_1_RX[0]
-set_instance_assignment -name XCVR_A10_RX_EQ_DC_GAIN_TRIM NO_DC_GAIN -to                RING_1_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_VGA_SEL RADP_VGA_SEL_3 -to                RING_1_RX[0]
-set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to                           RING_1_RX[0]
-
-#RING_0 TX assignments
-set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to                   RING_0_TX[0]
-set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to                  RING_0_TX[0]
-set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to                           RING_0_TX[0]
-set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to                    RING_0_TX[0]
-set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to     RING_0_TX[0]
-set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to RING_0_TX[0]
-
-#RING_1 TX assignments
-set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to                   RING_1_TX[0]
-set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to                  RING_1_TX[0]
-set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to                           RING_1_TX[0]
-set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to                    RING_1_TX[0]
-set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to     RING_1_TX[0]
-set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to RING_1_TX[0]
-
+source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2c_sdp_station/quartus/lofar2_unb2c_sdp_station_ring_pins.tcl
+source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2c_sdp_station/quartus/lofar2_unb2c_sdp_station_beamlets_pins.tcl
 
 

applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_xsub_ring/lofar2_unb2c_sdp_station_xsub_ring_pins.tcl

@@ -19,78 +19,6 @@
 #
 ###############################################################################
 source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2c_sdp_station/quartus/lofar2_unb2c_sdp_station_pins.tcl
-
-# Define extra pins for this revision.
-### QSFP_0_0 For ring
-set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to                  QSFP_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_TERM_SEL R_R1 -to                            QSFP_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP5 RADP_DFE_FXTAP5_0 -to         QSFP_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP4 RADP_DFE_FXTAP4_0 -to         QSFP_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP1 RADP_DFE_FXTAP1_0 -to         QSFP_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP7 RADP_DFE_FXTAP7_0 -to         QSFP_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP6 RADP_DFE_FXTAP6_0 -to         QSFP_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP3 RADP_DFE_FXTAP3_0 -to         QSFP_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP2 RADP_DFE_FXTAP2_0 -to         QSFP_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ONE_STAGE_ENABLE NON_S1_MODE -to             QSFP_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_CTLE_ACGAIN_4S RADP_CTLE_ACGAIN_4S_8 -to QSFP_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_EQ_DC_GAIN_TRIM NO_DC_GAIN -to               QSFP_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_VGA_SEL RADP_VGA_SEL_5 -to               QSFP_0_RX[0]
-set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to                          QSFP_0_RX[0]
-
-set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to                   QSFP_0_TX[0]
-set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to                  QSFP_0_TX[0]
-set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to                           QSFP_0_TX[0]
-set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to                    QSFP_0_TX[0]
-set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to     QSFP_0_TX[0]
-set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to QSFP_0_TX[0]
-
-#RING_0 RX assignments
-set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to                   RING_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_TERM_SEL R_R1 -to                             RING_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP5 RADP_DFE_FXTAP5_0 -to          RING_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP4 RADP_DFE_FXTAP4_0 -to          RING_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP1 RADP_DFE_FXTAP1_0 -to          RING_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP7 RADP_DFE_FXTAP7_0 -to          RING_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP6 RADP_DFE_FXTAP6_0 -to          RING_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP3 RADP_DFE_FXTAP3_0 -to          RING_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP2 RADP_DFE_FXTAP2_0 -to          RING_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ONE_STAGE_ENABLE NON_S1_MODE -to              RING_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_CTLE_ACGAIN_4S RADP_CTLE_ACGAIN_4S_12 -to RING_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_EQ_DC_GAIN_TRIM NO_DC_GAIN -to                RING_0_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_VGA_SEL RADP_VGA_SEL_3 -to                RING_0_RX[0]
-set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to                           RING_0_RX[0]
-
-#RING_1 RX assignments
-set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to                   RING_1_RX[0]
-set_instance_assignment -name XCVR_A10_RX_TERM_SEL R_R1 -to                             RING_1_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP5 RADP_DFE_FXTAP5_0 -to          RING_1_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP4 RADP_DFE_FXTAP4_0 -to          RING_1_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP1 RADP_DFE_FXTAP1_0 -to          RING_1_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP7 RADP_DFE_FXTAP7_0 -to          RING_1_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP6 RADP_DFE_FXTAP6_0 -to          RING_1_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP3 RADP_DFE_FXTAP3_0 -to          RING_1_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP2 RADP_DFE_FXTAP2_0 -to          RING_1_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ONE_STAGE_ENABLE NON_S1_MODE -to              RING_1_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_CTLE_ACGAIN_4S RADP_CTLE_ACGAIN_4S_12 -to RING_1_RX[0]
-set_instance_assignment -name XCVR_A10_RX_EQ_DC_GAIN_TRIM NO_DC_GAIN -to                RING_1_RX[0]
-set_instance_assignment -name XCVR_A10_RX_ADP_VGA_SEL RADP_VGA_SEL_3 -to                RING_1_RX[0]
-set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to                           RING_1_RX[0]
-
-#RING_0 TX assignments
-set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to                   RING_0_TX[0]
-set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to                  RING_0_TX[0]
-set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to                           RING_0_TX[0]
-set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to                    RING_0_TX[0]
-set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to     RING_0_TX[0]
-set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to RING_0_TX[0]
-
-#RING_1 TX assignments
-set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to                   RING_1_TX[0]
-set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to                  RING_1_TX[0]
-set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to                           RING_1_TX[0]
-set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to                    RING_1_TX[0]
-set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to     RING_1_TX[0]
-set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to RING_1_TX[0]
-
+source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2c_sdp_station/quartus/lofar2_unb2c_sdp_station_ring_pins.tcl
 
 

applications/lofar2/libraries/sdp/src/vhdl/sdp_beamformer_remote.vhd

@@ -64,13 +64,13 @@ ARCHITECTURE str OF sdp_beamformer_remote IS
   
   CONSTANT c_data_w             : NATURAL := c_nof_complex * c_sdp_W_beamlet_sum;
   CONSTANT c_block_size         : NATURAL := c_sdp_S_sub_bf * c_sdp_N_pol_bf;
-  CONSTANT c_fifo_size          : NATURAL := 2** ceil_log2((c_block_size * 9) / 16); -- 1 block of 64 bit words rounded to the next power of 2 = 1024.
+  CONSTANT c_fifo_size          : NATURAL := 2** ceil_log2((c_block_size * 9) / 16); -- 9/16 = 36/64, 1 block of 64 bit words rounded to the next power of 2 = 1024.
 
-  SIGNAL dispatch_sosi_arr      : t_dp_sosi_arr(1 DOWNTO 0)  := (OTHERS => c_dp_sosi_rst); -- 1 for local, 1 for remote.
+  SIGNAL dispatch_sosi_arr      : t_dp_sosi_arr(c_dual-1 DOWNTO 0)  := (OTHERS => c_dp_sosi_rst); -- 1 for local, 1 for remote.
   SIGNAL dp_fifo_sosi           : t_dp_sosi := c_dp_sosi_rst;
   SIGNAL dp_fifo_siso           : t_dp_siso := c_dp_siso_rdy;
-  SIGNAL beamlets_data_sosi_arr : t_dp_sosi_arr(1 DOWNTO 0)  := (OTHERS => c_dp_sosi_rst);
-  SIGNAL beamlets_sosi_arr      : t_dp_sosi_arr(1 DOWNTO 0)  := (OTHERS => c_dp_sosi_rst);
+  SIGNAL beamlets_data_sosi_arr : t_dp_sosi_arr(c_dual-1 DOWNTO 0)  := (OTHERS => c_dp_sosi_rst);
+  SIGNAL beamlets_sosi_arr      : t_dp_sosi_arr(c_dual-1 DOWNTO 0)  := (OTHERS => c_dp_sosi_rst);
   SIGNAL i_bf_sum_sosi          : t_dp_sosi := c_dp_sosi_rst;
   SIGNAL bf_sum_data_sosi       : t_dp_sosi := c_dp_sosi_rst;
 BEGIN
@@ -108,9 +108,9 @@ BEGIN
   u_dp_repack_data_rx : ENTITY dp_lib.dp_repack_data
   GENERIC MAP (
     g_in_dat_w       => c_longword_w,
-    g_in_nof_words   => 9,
+    g_in_nof_words   => 9, -- 9/16 = 36/64
     g_out_dat_w      => c_data_w,
-    g_out_nof_words  => 16,
+    g_out_nof_words  => 16, -- 9/16 = 36/64
     g_pipeline_ready => TRUE
   )
   PORT MAP (
@@ -128,16 +128,16 @@ BEGIN
   u_mmp_dp_bsn_align_v2 : ENTITY dp_lib.mmp_dp_bsn_align_v2
   GENERIC MAP(
     -- for dp_bsn_align_v2
-    g_nof_streams             => 2,    
-    g_bsn_latency_max         => 2,    
-    g_nof_aligners_max        => 1, 
+    g_nof_streams             => c_dual,    
+    g_bsn_latency_max         => 2, -- max 2 blocks latency
+    g_nof_aligners_max        => c_sdp_N_pn_max, 
     g_block_size              => c_block_size,    
     g_data_w                  => c_data_w,    
     g_use_mm_output           => FALSE,   
     g_rd_latency              => 1,  
     -- for mms_dp_bsn_monitor_v2
     g_nof_clk_per_sync        => c_sdp_N_clk_sync_timeout, -- Using c_sdp_N_clk_sync_timeout as g_nof_clk_per_sync is used for BSN monitor timeout.
-    g_nof_input_bsn_monitors  => 2,  
+    g_nof_input_bsn_monitors  => c_dual,  
     g_use_bsn_output_monitor  => TRUE  
     )
   PORT MAP (
@@ -179,7 +179,7 @@ BEGIN
   ---------------------------------------------------------------
   u_dp_complex_add : ENTITY dp_lib.dp_complex_add
   GENERIC MAP(
-    g_nof_inputs => 2,
+    g_nof_inputs => c_dual,
     g_data_w => c_sdp_W_beamlet_sum 
   )
   PORT MAP(
@@ -206,9 +206,9 @@ BEGIN
   u_dp_repack_data_local : ENTITY dp_lib.dp_repack_data
   GENERIC MAP (
     g_in_dat_w       => c_data_w,
-    g_in_nof_words   => 16,
+    g_in_nof_words   => 16,  -- 16/9 = 64/36
     g_out_dat_w      => c_longword_w,
-    g_out_nof_words  => 9,
+    g_out_nof_words  => 9,   -- 16/9 = 64/36
     g_pipeline_ready => TRUE  
   )
   PORT MAP (

applications/lofar2/libraries/sdp/src/vhdl/sdp_pkg.vhd

@@ -402,7 +402,8 @@ PACKAGE sdp_pkg is
   -----------------------------------------------------------------------------
   -- BSN monitor V2 address width
   CONSTANT c_sdp_reg_bsn_monitor_v2_addr_w  : NATURAL := ceil_Log2(7);
-
+  -- BSN align address width
+  CONSTANT c_sdp_reg_bsn_align_v2_addr_w    : NATURAL := ceil_log2(2); 
   -- 10GbE MM address widths
   CONSTANT c_sdp_reg_bf_hdr_dat_addr_w      : NATURAL := ceil_log2(c_sdp_N_beamsets) + c_sdp_reg_cep_hdr_dat_addr_w;
   CONSTANT c_sdp_reg_nw_10GbE_mac_addr_w    : NATURAL := 13;
@@ -452,8 +453,8 @@ PACKAGE sdp_pkg is
   CONSTANT c_sdp_reg_stat_hdr_dat_bst_addr_w                 : NATURAL := ceil_log2(c_sdp_N_beamsets) + c_sdp_reg_stat_hdr_dat_addr_w;
   CONSTANT c_sdp_reg_bsn_monitor_v2_bst_offload_addr_w       : NATURAL := ceil_log2(c_sdp_N_beamsets) + c_sdp_reg_bsn_monitor_v2_addr_w;
   CONSTANT c_sdp_reg_bsn_monitor_v2_beamlet_output_addr_w    : NATURAL := ceil_log2(c_sdp_N_beamsets) + c_sdp_reg_bsn_monitor_v2_addr_w;
-  CONSTANT c_sdp_reg_bsn_align_v2_bf_addr_w                  : NATURAL := ceil_log2(c_sdp_N_beamsets) + ceil_log2(2*2); 
-  CONSTANT c_sdp_reg_bsn_monitor_v2_rx_align_bf_addr_w       : NATURAL := ceil_log2(c_sdp_N_beamsets) + ceil_log2(2) + c_sdp_reg_bsn_monitor_v2_addr_w;
+  CONSTANT c_sdp_reg_bsn_align_v2_bf_addr_w                  : NATURAL := ceil_log2(c_sdp_N_beamsets) + ceil_log2(dual) + c_sdp_reg_bsn_align_v2_addr_w; 
+  CONSTANT c_sdp_reg_bsn_monitor_v2_rx_align_bf_addr_w       : NATURAL := ceil_log2(c_sdp_N_beamsets) + ceil_log2(dual) + c_sdp_reg_bsn_monitor_v2_addr_w;
   CONSTANT c_sdp_reg_bsn_monitor_v2_aligned_bf_addr_w        : NATURAL := ceil_log2(c_sdp_N_beamsets) + c_sdp_reg_bsn_monitor_v2_addr_w;
   CONSTANT c_sdp_reg_ring_lane_info_bf_addr_w                : NATURAL := ceil_log2(c_sdp_N_beamsets) + 1;
   CONSTANT c_sdp_reg_bsn_monitor_v2_ring_rx_bf_addr_w        : NATURAL := ceil_log2(c_sdp_N_beamsets) + ceil_log2(c_sdp_N_pn_max) + c_sdp_reg_bsn_monitor_v2_addr_w;
@@ -491,7 +492,7 @@ PACKAGE sdp_pkg is
   CONSTANT c_sdp_reg_bsn_sync_scheduler_xsub_addr_w            : NATURAL := 4; 
   CONSTANT c_sdp_ram_st_xsq_addr_w                             : NATURAL := ceil_log2(c_sdp_N_crosslets_max * c_sdp_X_sq * c_nof_complex * c_sdp_W_statistic_sz);
   CONSTANT c_sdp_ram_st_xsq_arr_addr_w                         : NATURAL := ceil_log2(c_sdp_P_sq) + c_sdp_ram_st_xsq_addr_w;
-  CONSTANT c_sdp_reg_bsn_align_v2_xsub_addr_w                  : NATURAL := ceil_log2(2*c_sdp_P_sq); 
+  CONSTANT c_sdp_reg_bsn_align_v2_xsub_addr_w                  : NATURAL := ceil_log2(c_sdp_P_sq) + c_sdp_reg_bsn_align_v2_addr_w; 
   CONSTANT c_sdp_reg_bsn_monitor_v2_rx_align_xsub_addr_w       : NATURAL := ceil_log2(c_sdp_P_sq) + c_sdp_reg_bsn_monitor_v2_addr_w;
   CONSTANT c_sdp_reg_bsn_monitor_v2_aligned_xsub_addr_w        : NATURAL := c_sdp_reg_bsn_monitor_v2_addr_w;
   CONSTANT c_sdp_reg_bsn_monitor_v2_xst_offload_addr_w         : NATURAL := c_sdp_reg_bsn_monitor_v2_addr_w;

applications/lofar2/libraries/sdp/src/vhdl/sdp_station.vhd

@@ -379,8 +379,8 @@ ARCHITECTURE str OF sdp_station IS
   CONSTANT c_addr_w_reg_hdr_dat                    : NATURAL := ceil_log2(field_nof_words(c_sdp_cep_hdr_field_arr, c_word_w)); 
   CONSTANT c_addr_w_reg_dp_xonoff                  : NATURAL := 1; 
   CONSTANT c_addr_w_ram_st_bst                     : NATURAL := ceil_log2(c_sdp_S_sub_bf*c_sdp_N_pol*(c_longword_sz/c_word_sz));
-  CONSTANT c_addr_w_reg_bsn_align_v2_bf            : NATURAL := ceil_log2(2*2);
-  CONSTANT c_addr_w_reg_bsn_monitor_v2_rx_align_bf : NATURAL := ceil_log2(2) + c_sdp_reg_bsn_monitor_v2_addr_w;
+  CONSTANT c_addr_w_reg_bsn_align_v2_bf            : NATURAL := ceil_log2(c_dual) + c_sdp_reg_bsn_align_v2_addr_w;
+  CONSTANT c_addr_w_reg_bsn_monitor_v2_rx_align_bf : NATURAL := ceil_log2(c_dual) + c_sdp_reg_bsn_monitor_v2_addr_w;
   CONSTANT c_addr_w_reg_bsn_monitor_v2_ring_rx_bf  : NATURAL := ceil_log2(c_sdp_N_pn_max) + c_sdp_reg_bsn_monitor_v2_addr_w;
   CONSTANT c_addr_w_reg_bsn_monitor_v2_ring_tx_bf  : NATURAL := ceil_log2(c_sdp_N_pn_max) + c_sdp_reg_bsn_monitor_v2_addr_w;
 
@@ -389,8 +389,8 @@ ARCHITECTURE str OF sdp_station IS
   CONSTANT c_fsub_type : STD_LOGIC := '0'; -- '0' => critical sampled PFB, '1' => oversampled PFB
  
   CONSTANT c_use_dp_layer              : BOOLEAN := TRUE; 
-  CONSTANT c_lane_packet_length_xst    : NATURAL := c_sdp_N_crosslets_max * c_sdp_S_pn / 2; -- = crosslet subband select block size devided by 2 as it is repacked from 32b to 64b. = 42
-  CONSTANT c_lane_packet_length_bf     : NATURAL := (c_sdp_S_sub_bf * c_sdp_N_pol_bf * 9) / 16; -- = beamlet block size repacked from 36b to 64b. = 549
+  CONSTANT c_lane_packet_length_xst    : NATURAL := c_sdp_N_crosslets_max * c_sdp_S_pn / 2; -- = crosslet subband select block size devided by 2 as it is repacked from 32b to 64b. = 42 words
+  CONSTANT c_lane_packet_length_bf     : NATURAL := (c_sdp_S_sub_bf * c_sdp_N_pol_bf * 9) / 16; -- = beamlet block size repacked from 36b to 64b (9/16 = 36/64). = 549 words
   CONSTANT c_err_bi                    : NATURAL := 0; 
   CONSTANT c_nof_err_counts            : NATURAL := 8; 
   CONSTANT c_bsn_at_sync_check_channel : NATURAL := 1; 
@@ -405,7 +405,7 @@ ARCHITECTURE str OF sdp_station IS
   CONSTANT c_qsfp_if_offset            : NATURAL := 0; -- QSFP signals are indexed at c_nof_if * I.
   CONSTANT c_ring_0_if_offset          : NATURAL := 1; -- RING_0 signals are indexed at c_nof_if * I + 1. 
   CONSTANT c_ring_1_if_offset          : NATURAL := 2; -- RING_1 signals are indexed at c_nof_if * I + 2.
-  CONSTANT c_nof_mac                   : NATURAL := 12; -- Using 9, must match one of the MAC IP variations, e.g. 1, 3, 4, 12, 24, 48
+  CONSTANT c_nof_mac                   : NATURAL := 12; -- Using 9 out of 12 (this is NOT optimized away during synthesis), must match one of the MAC IP variations, e.g. 1, 3, 4, 12, 24, 48
 
   SIGNAL gn_index : NATURAL := 0;
   SIGNAL this_rn  : STD_LOGIC_VECTOR(c_byte_w-1 DOWNTO 0);  

libraries/base/common/src/vhdl/common_pkg.vhd

@@ -41,6 +41,7 @@ PACKAGE common_pkg IS
   CONSTANT c_1                    : NATURAL := 1;
   CONSTANT c_one                  : NATURAL := 1;
   CONSTANT c_2                    : NATURAL := 2;
+  CONSTANT c_dual                 : NATURAL := 2;
   CONSTANT c_4                    : NATURAL := 4;
   CONSTANT c_quad                 : NATURAL := 4;
   CONSTANT c_8                    : NATURAL := 8;