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Commit bb7a1448 authored by Daniel van der Schuur's avatar Daniel van der Schuur
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-Implemented accumulator output that outputs one accumulated channel block

 per integration period.
-Verified in sim using tc_correlator.py.
parent d8b1d0ee
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...@@ -43,8 +43,8 @@ ENTITY corr_accumulator IS ...@@ -43,8 +43,8 @@ ENTITY corr_accumulator IS
rst : IN STD_LOGIC; rst : IN STD_LOGIC;
clk : IN STD_LOGIC; clk : IN STD_LOGIC;
snk_in_arr : IN t_dp_sosi_arr; snk_in_arr : IN t_dp_sosi_arr(g_nof_inputs-1 DOWNTO 0);
src_out_arr : OUT t_dp_sosi_arr src_out_arr : OUT t_dp_sosi_arr(g_nof_inputs-1 DOWNTO 0)
); );
END corr_accumulator; END corr_accumulator;
...@@ -74,7 +74,7 @@ ARCHITECTURE str OF corr_accumulator IS ...@@ -74,7 +74,7 @@ ARCHITECTURE str OF corr_accumulator IS
TYPE t_common_shiftram_data_out_shift_arr IS ARRAY(g_nof_inputs-1 DOWNTO 0) OF STD_LOGIC_VECTOR(c_shift_w-1 DOWNTO 0); TYPE t_common_shiftram_data_out_shift_arr IS ARRAY(g_nof_inputs-1 DOWNTO 0) OF STD_LOGIC_VECTOR(c_shift_w-1 DOWNTO 0);
SIGNAL common_shiftram_data_out_shift_arr : t_common_shiftram_data_out_shift_arr; SIGNAL common_shiftram_data_out_shift_arr : t_common_shiftram_data_out_shift_arr;
SIGNAL nxt_src_out_arr : t_dp_sosi_arr(g_nof_inputs-1 DOWNTO 0);
BEGIN BEGIN
...@@ -97,17 +97,6 @@ BEGIN ...@@ -97,17 +97,6 @@ BEGIN
common_shiftram_src_out_arr(i).data( c_acc_data_w-1 DOWNTO 0); common_shiftram_src_out_arr(i).data( c_acc_data_w-1 DOWNTO 0);
END GENERATE; END GENERATE;
p_clk : PROCESS (clk, rst)
BEGIN
IF rst='1' THEN
acc_cnt <= (OTHERS=>'0');
corr_adder_snk_in_2arr_2 <= (OTHERS=>(OTHERS=>c_dp_sosi_rst));
ELSIF rising_edge(clk) THEN
acc_cnt <= nxt_acc_cnt;
corr_adder_snk_in_2arr_2 <= nxt_corr_adder_snk_in_2arr_2;
END IF;
END PROCESS;
----------------------------------------------------------------------------- -----------------------------------------------------------------------------
-- Complex adder stage -- Complex adder stage
----------------------------------------------------------------------------- -----------------------------------------------------------------------------
...@@ -158,13 +147,33 @@ BEGIN ...@@ -158,13 +147,33 @@ BEGIN
END GENERATE; END GENERATE;
----------------------------------------------------------------------------- -----------------------------------------------------------------------------
-- Output 1/g_nof_acc_per_input words per stream -- Output g_nof_words_to_acc per stream once per integration period
-- . Not implemented yet. -- . The first g_nof_acc_per_input words are output. At the same time, the
-- accumulators are reset (zeros) at the adder inputs.
-- . Make sure the shiftram output is valid too so we don't output a block
-- of zeros initially.
----------------------------------------------------------------------------- -----------------------------------------------------------------------------
gen_src_out_arr : FOR i IN 0 TO g_nof_inputs-1 GENERATE gen_src_out_arr : FOR i IN 0 TO g_nof_inputs-1 GENERATE
src_out_arr(i).re(c_acc_data_w-1 DOWNTO 0) <= common_shiftram_src_out_arr(i).data(2*c_acc_data_w-1 DOWNTO c_acc_data_w); nxt_src_out_arr(i).re(c_acc_data_w-1 DOWNTO 0) <= common_shiftram_src_out_arr(i).data(2*c_acc_data_w-1 DOWNTO c_acc_data_w);
src_out_arr(i).im(c_acc_data_w-1 DOWNTO 0) <= common_shiftram_src_out_arr(i).data( c_acc_data_w-1 DOWNTO 0); nxt_src_out_arr(i).im(c_acc_data_w-1 DOWNTO 0) <= common_shiftram_src_out_arr(i).data( c_acc_data_w-1 DOWNTO 0);
src_out_arr(i).valid <= common_shiftram_src_out_arr(i).valid;
nxt_src_out_arr(i).valid <= '1' WHEN TO_UINT(acc_cnt)<g_nof_acc_per_input AND common_shiftram_src_out_arr(0).valid='1' ELSE '0';
END GENERATE; END GENERATE;
-----------------------------------------------------------------------------
-- Registers
-----------------------------------------------------------------------------
p_clk : PROCESS (clk, rst)
BEGIN
IF rst='1' THEN
acc_cnt <= (OTHERS=>'0');
corr_adder_snk_in_2arr_2 <= (OTHERS=>(OTHERS=>c_dp_sosi_rst));
src_out_arr <= (OTHERS=>c_dp_sosi_rst);
ELSIF rising_edge(clk) THEN
acc_cnt <= nxt_acc_cnt;
corr_adder_snk_in_2arr_2 <= nxt_corr_adder_snk_in_2arr_2;
src_out_arr <= nxt_src_out_arr;
END IF;
END PROCESS;
END str; END str;
...@@ -35,41 +35,36 @@ COMPLEX_WIDTH = 16 ...@@ -35,41 +35,36 @@ COMPLEX_WIDTH = 16
NOF_INPUTS = 10 NOF_INPUTS = 10
NOF_OUTPUTS = NOF_INPUTS*(NOF_INPUTS+1)/2 NOF_OUTPUTS = NOF_INPUTS*(NOF_INPUTS+1)/2
NOF_CHANNELS = 64 NOF_CHANNELS = 64
NOF_TIMESAMPLES = 4 BUFFER_WIDTH = 64
#BUFFER_DEPTH = 256
BUFFER_WIDTH = 64 #2*COMPLEX_WIDTH
tc = test_case.Testcase('TB - ', '') tc = test_case.Testcase('TB - ', '')
io = node_io.NodeIO(tc.nodeImages, tc.base_ip) io = node_io.NodeIO(tc.nodeImages, tc.base_ip)
db = pi_diag_data_buffer.PiDiagDataBuffer(tc, io, nofStreams=NOF_OUTPUTS, ramSizePerStream=2*256) db = pi_diag_data_buffer.PiDiagDataBuffer(tc, io, nofStreams=NOF_OUTPUTS, ramSizePerStream=2*NOF_CHANNELS)
############################################################################### ###############################################################################
# Read data buffers # Read data buffers
# . Read 256 words # . Read NOF_CHANNELS accumulator values
# . 256 words = 4 timesamples * 64 channels
############################################################################### ###############################################################################
data = [] data = []
do_until_ge(db.read_nof_words, ms_retry=2000, val=256, s_timeout=900) do_until_ge(db.read_nof_words, ms_retry=2000, val=NOF_CHANNELS, s_timeout=900)
for output_nr in range(NOF_OUTPUTS): for output_nr in range(NOF_OUTPUTS):
data.append( db.read_data_buffer(streamNr=output_nr, n=2*256, radix='uns', width=BUFFER_WIDTH, nofColumns=12)[0] ) data.append( db.read_data_buffer(streamNr=output_nr, n=2*NOF_CHANNELS, radix='uns', width=BUFFER_WIDTH, nofColumns=12)[0] )
############################################################################### ###############################################################################
# 'data' is now a 2d array of [NOF_OUTPUTS][NOF_TIMESAMPLES*NOF_CHANNELS]. We # 'data' is now a 2d array of [NOF_OUTPUTS][NOF_CHANNELS]. We
# want to group the outputs by channel, so transpose this 2d array into # want to group the outputs by channel, so transpose this 2d array into
# [NOF_TIMESAMPLES*NOF_CHANNELS][NOF_OUTPUTS] # [NOF_CHANNELS][NOF_OUTPUTS]
############################################################################### ###############################################################################
data = transpose(data) data = transpose(data)
for sample_nr in range(NOF_TIMESAMPLES):
mat_list = [] mat_list = []
amplitudes = [] amplitudes = []
for channel_nr in range(NOF_CHANNELS): for channel_nr in range(NOF_CHANNELS):
############################################################################### ###############################################################################
# Convert the unsigned words to complex # Convert the unsigned words to complex
############################################################################### ###############################################################################
channel_data = data[sample_nr*NOF_CHANNELS+channel_nr] channel_data = data[channel_nr]
for index,word in enumerate(channel_data): for index,word in enumerate(channel_data):
word_bits = CommonBits(word, BUFFER_WIDTH) word_bits = CommonBits(word, BUFFER_WIDTH)
re = word_bits[BUFFER_WIDTH-1:BUFFER_WIDTH/2] re = word_bits[BUFFER_WIDTH-1:BUFFER_WIDTH/2]
...@@ -100,7 +95,7 @@ for sample_nr in range(NOF_TIMESAMPLES): ...@@ -100,7 +95,7 @@ for sample_nr in range(NOF_TIMESAMPLES):
################################################################################ ################################################################################
# re-shape the flat list of 64 matrices into a an 8*8 matrix of matrices, plot # re-shape the flat list of 64 matrices into a an 8*8 matrix of matrices, plot
################################################################################ ################################################################################
print 'Plotting phases of timesample %d, %d channels.' %(sample_nr,NOF_CHANNELS) print 'Plotting phases of %d channels.' %NOF_CHANNELS
print '. Channel amplitudes:' print '. Channel amplitudes:'
for channel_nr in range(NOF_CHANNELS): for channel_nr in range(NOF_CHANNELS):
print ' .', channel_nr, ' - ', amplitudes[channel_nr] print ' .', channel_nr, ' - ', amplitudes[channel_nr]
......
...@@ -37,6 +37,7 @@ ARCHITECTURE tb OF tb_correlator IS ...@@ -37,6 +37,7 @@ ARCHITECTURE tb OF tb_correlator IS
CONSTANT c_nof_inputs : NATURAL := 10; CONSTANT c_nof_inputs : NATURAL := 10;
CONSTANT c_nof_mults : NATURAL := (c_nof_inputs*(c_nof_inputs+1))/2; CONSTANT c_nof_mults : NATURAL := (c_nof_inputs*(c_nof_inputs+1))/2;
CONSTANT c_nof_channels : NATURAL := 64;
CONSTANT c_dp_clk_period : TIME := 10 ns; CONSTANT c_dp_clk_period : TIME := 10 ns;
CONSTANT c_mm_clk_period : TIME := 10 ps; CONSTANT c_mm_clk_period : TIME := 10 ps;
...@@ -148,7 +149,7 @@ BEGIN ...@@ -148,7 +149,7 @@ BEGIN
g_nof_streams => c_nof_mults, g_nof_streams => c_nof_mults,
g_data_w => 64, g_data_w => 64,
g_data_type => e_complex, g_data_type => e_complex,
g_buf_nof_data => 256, --c_bg_block_size, g_buf_nof_data => c_nof_channels,
g_buf_use_sync => FALSE g_buf_use_sync => FALSE
) )
PORT MAP ( PORT MAP (
......
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