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Commit b95c67af authored by Job van Wee's avatar Job van Wee
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parent 133bf9a9
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1 merge request!246Resolve L2SDP-706
Pipeline #29575 passed
......@@ -53,7 +53,6 @@ ENTITY ddrctrl IS
g_data_w : NATURAL := 14; -- data with of input data vectors
g_stop_percentage : NATURAL := 50;
g_block_size : NATURAL := 1024;
g_burstsize : NATURAL := 64
);
PORT (
clk : IN STD_LOGIC := '0';
......@@ -90,6 +89,7 @@ ARCHITECTURE str OF ddrctrl IS
CONSTANT c_wr_fifo_uw_w : NATURAL := ceil_log2(c_wr_fifo_depth*(func_tech_ddr_ctlr_data_w(g_tech_ddr)/c_io_ddr_data_w));
CONSTANT c_rd_fifo_uw_w : NATURAL := ceil_log2(c_rd_fifo_depth*(func_tech_ddr_ctlr_data_w(g_tech_ddr)/c_io_ddr_data_w));
CONSTANT c_burstsize : NATURAL := t_c_tech_ddr.max_burstsize;
CONSTANT c_adr_w : NATURAL := func_tech_ddr_ctlr_address_w(g_tech_ddr); -- the lengt of the address vector, for simulation this is smaller, otherwise the simulation would take to long, 27
CONSTANT c_max_adr : NATURAL := 2**(c_adr_w)-1; -- the maximal address that is possible within the vector length of the address
CONSTANT c_bim : NATURAL := (c_max_adr*c_io_ddr_data_w)/(g_block_size*g_nof_streams*g_data_w); -- the amount of whole blocks that fit in memory.
......@@ -105,8 +105,8 @@ ARCHITECTURE str OF ddrctrl IS
-- the amount of overflow after one block is written
CONSTANT c_of_pb : NATURAL := (g_block_size*g_nof_streams*g_data_w)-(((g_block_size*g_nof_streams*g_data_w)/c_io_ddr_data_w)*c_io_ddr_data_w); -- amount of overflow after one block is written to memory
CONSTANT c_aof_full_burst : NATURAL := c_nof_adr/g_burstsize;
CONSTANT c_last_burstsize : NATURAL := c_nof_adr-(c_aof_full_burst*g_burstsize);
CONSTANT c_aof_full_burst : NATURAL := c_nof_adr/c_burstsize;
CONSTANT c_last_burstsize : NATURAL := c_nof_adr-(c_aof_full_burst*c_burstsize);
SIGNAL s_last_burstsize : NATURAL := c_last_burstsize;
......@@ -267,7 +267,7 @@ BEGIN
g_wr_fifo_uw_w => c_wr_fifo_uw_w,
g_rd_fifo_uw_w => c_rd_fifo_uw_w,
g_max_adr => c_nof_adr,
g_burstsize => g_burstsize,
g_burstsize => c_burstsize,
g_last_burstsize => c_last_burstsize,
g_adr_per_b => c_adr_per_b,
g_bim => c_bim
......
......@@ -182,16 +182,11 @@ BEGIN
v.dvr_mosi.burstbegin := '1';
v.dvr_mosi.burstsize(dvr_mosi.burstsize'length-1 DOWNTO 0) := TO_UVEC(g_burstsize-q_reg.stop_burstsize, dvr_mosi.burstsize'length);
v.wr_burst_en := '0';
v.wr_burst_en := '1';
v.state := WRITING;
ELSE
v.dvr_mosi.burstbegin := '0';
END IF;
-- makes sure the fifo is filled before asking for another rd request. to prevent 4 rd burst to happend directly after one another.
IF dvr_miso.done = '0' AND q_reg.wr_burst_en = '0' THEN
v.wr_burst_en := '1';
v.state := WRITING;
ELSE
v.state := START_WRITING;
v.state := START_WRITING;
END IF;
......
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