-Updated constants and generics to use input folding.

applications/apertif_unb1_correlator/src/vhdl/unb1_apertif_correlator.vhd

@@ -67,7 +67,7 @@ END apertif_unb1_correlator;
 ARCHITECTURE str OF apertif_unb1_correlator IS
 
   -- Firmware version x.y
-  CONSTANT c_fw_version             : t_unb1_board_fw_version := (1, 1);
+  CONSTANT c_fw_version             : t_unb1_board_fw_version := (0, 1);
   -- In simulation we don't need the 1GbE core for MM control, deselect it in c_use_phy based on g_sim
   CONSTANT c_use_phy                : t_c_unb1_board_use_phy  := (sel_a_b(g_sim, 0, 1), 0, 0, 0, 0, 0, 0, 1);
 
@@ -117,6 +117,8 @@ ARCHITECTURE str OF apertif_unb1_correlator IS
 
   -- Correlator
   CONSTANT c_nof_inputs             : NATURAL := 24;
+  CONSTANT c_nof_input_folds        : NATURAL := 1;
+  CONSTANT c_nof_input_streams      : NATURAL := c_nof_inputs / pow2(c_nof_input_folds);
   CONSTANT c_nof_pre_mult_folds     : NATURAL := 1; 
   CONSTANT c_complex_data_w         : NATURAL := 8;
   CONSTANT c_conjugate              : BOOLEAN := TRUE;
@@ -125,12 +127,9 @@ ARCHITECTURE str OF apertif_unb1_correlator IS
 
   CONSTANT c_nof_visibilities       : NATURAL := (c_nof_inputs*(c_nof_inputs+1))/2;
 
-  -- Gap size on the correlator input depends on the number of folds
-  CONSTANT c_block_period           : NATURAL := pow2(c_nof_pre_mult_folds);
-
   -- Block generator
-  CONSTANT c_bg_block_size          : NATURAL := c_nof_channels;
-  CONSTANT c_bg_gapsize             : NATURAL := c_bg_block_size*(c_block_period-1);
+  CONSTANT c_bg_block_size          : NATURAL := c_nof_channels*pow2(c_nof_input_folds);
+  CONSTANT c_bg_gapsize             : NATURAL := 0;
 
   -- Indicate the integration period with the sync. In the correlator, the
   -- integration period is forced to a minimum of c_nof_visibilities to
@@ -148,12 +147,7 @@ ARCHITECTURE str OF apertif_unb1_correlator IS
                                                           TO_UVEC(   c_bg_block_size-1, c_diag_bg_mem_high_adrs_w),
                                                           TO_UVEC(                   0, c_diag_bg_bsn_init_w));
 
-  SIGNAL block_gen_src_out_arr      : t_dp_sosi_arr(c_nof_inputs-1 DOWNTO 0);
-
-  SIGNAL dp_fifo_sc_src_out_arr     : t_dp_sosi_arr(c_nof_inputs-1 DOWNTO 0);
-  SIGNAL dp_fifo_sc_src_in_arr      : t_dp_siso_arr(c_nof_inputs-1 DOWNTO 0);
-
-  SIGNAL correlator_snk_in_arr      : t_dp_sosi_arr(c_nof_inputs-1 DOWNTO 0);
+  SIGNAL correlator_snk_in_arr      : t_dp_sosi_arr(c_nof_input_streams-1 DOWNTO 0);
   SIGNAL correlator_src_out_arr     : t_dp_sosi_arr(1-1 DOWNTO 0);
 
   SIGNAL ram_diag_data_buf_mosi     : t_mem_mosi;
@@ -165,17 +159,17 @@ BEGIN
 
   -----------------------------------------------------------------------------
   -- Block generators
-  -- . Each stream in block_gen_src_out_arr contains complex subband samples
+  -- . Each stream in correlator_snk_in_arr contains complex subband samples
   --   from one 'antenna'.
   -- . These complex subband samples are generated and converted to a HEX RAM
   --   initialization file using Python, see tb/python/gen_subband_hex_files.py
   -----------------------------------------------------------------------------
   u_mms_diag_block_gen : ENTITY diag_lib.mms_diag_block_gen
   GENERIC MAP (
-    g_nof_output_streams => c_nof_inputs,
+    g_nof_output_streams => c_nof_input_streams,
     g_buf_dat_w          => 2*c_complex_data_w,
     g_buf_addr_w         => ceil_log2(TO_UINT(c_bg_ctrl.samples_per_packet)),
-    g_file_name_prefix   => "../../../libraries/dsp/correlator/src/hex/complex_subbands_" & NATURAL'IMAGE(c_complex_data_w),
+    g_file_name_prefix   => "../../../libraries/dsp/correlator/src/hex/complex_subbands_" & NATURAL'IMAGE(c_complex_data_w) & "b_" & "fold_" & NATURAL'IMAGE(c_nof_input_folds),
     g_diag_block_gen_rst => c_bg_ctrl
   )
   PORT MAP (
@@ -185,61 +179,16 @@ BEGIN
     dp_rst           => dp_rst,
     dp_clk           => dp_clk,
 
-    out_sosi_arr     => block_gen_src_out_arr
+    out_sosi_arr     => correlator_snk_in_arr
   );
 
-  -----------------------------------------------------------------------------
-  -- Introduce gaps in the input stream
-  -- . mms_diag_block_gen does not support gaps within blocks.
-  -- . We'll use FIFO buffers and dp_gap to read out the FIFOs to introduce
-  --   gaps.
-  -----------------------------------------------------------------------------
-  gen_dp_fifo_sc : FOR i IN 0 TO c_nof_inputs-1 GENERATE
-    u_dp_fifo_sc : ENTITY dp_lib.dp_fifo_sc
-    GENERIC MAP (
-      g_data_w         => 2*c_complex_data_w,
-      g_use_ctrl       => FALSE,
-      g_use_complex    => TRUE,
-      g_fifo_size      => c_nof_channels,
-      g_fifo_af_margin => 0
-    )
-    PORT MAP (
-      rst         => dp_rst,
-      clk         => dp_clk,
-
-      wr_ful      => OPEN,
-      usedw       => OPEN,
-      rd_emp      => OPEN,
-
-      snk_out     => OPEN,
-      snk_in      => block_gen_src_out_arr(i),
-      src_in      => dp_fifo_sc_src_in_arr(i),
-      src_out     => dp_fifo_sc_src_out_arr(i)
-    );
-  END GENERATE;
-
-  gen_dp_src_out_timer : FOR i IN 0 TO c_nof_inputs-1 GENERATE
-    u_dp_src_out_timer : ENTITY dp_lib.dp_src_out_timer
-    GENERIC MAP (
-      g_block_period => c_block_period
-    )
-    PORT MAP (
-      rst                  => dp_rst,
-      clk                  => dp_clk,
-
-      snk_in               => dp_fifo_sc_src_out_arr(i),
-      snk_out              => dp_fifo_sc_src_in_arr(i)
-    );
-  END GENERATE;
-
-  correlator_snk_in_arr <= dp_fifo_sc_src_out_arr;
-
   -----------------------------------------------------------------------------
   -- Correlator
   -----------------------------------------------------------------------------
   u_correlator : ENTITY correlator_lib.correlator
   GENERIC MAP (
-    g_nof_inputs         => c_nof_inputs,
+    g_nof_input_streams  => c_nof_input_streams,
+    g_nof_input_folds    => c_nof_input_folds,
     g_nof_pre_mult_folds => c_nof_pre_mult_folds,
     g_data_w             => c_complex_data_w,
     g_conjugate          => c_conjugate,