Added +synth_top_level_entity key. Set empty build_synth_dir key build synth locally.

boards/uniboard1/designs/unb1_minimal/hdllib.cfg

@@ -3,7 +3,7 @@ hdl_library_clause_name = unb1_minimal_lib
 hdl_lib_uses = common mm i2c unb1_board
 
 build_sim_dir = $HDL_BUILD_DIR
-build_synth_dir = build
+build_synth_dir = 
 
 synth_files =
     $UNB/Firmware/designs/unb_minimal/build/synth/quartus/sopc_unb_minimal.vhd
@@ -12,3 +12,5 @@ synth_files =
     
 test_bench_files = 
     tb/vhdl/tb_unb1_minimal.vhd
+
+synth_top_level_entity =