Add package test bench reorder_pkg_test.vhd.

libraries/base/reorder/hdllib.cfg

@@ -49,6 +49,8 @@ synth_files =
     src/vhdl/mms_reorder_rewire.vhd
 
 test_bench_files =
+    tb/vhdl/reorder_pkg_test.vhd
+    tb/vhdl/reorder_pkg_test_test.vhd
     tb/vhdl/tb_reorder_transpose.vhd
     tb/vhdl/tb_reorder_col.vhd
     tb/vhdl/tb_tb_reorder_col.vhd
@@ -62,6 +64,8 @@ test_bench_files =
     tb/vhdl/tb_tb_reorder_col_select_all.vhd
 
 regression_test_vhdl =
+    tb/vhdl/reorder_pkg_test.vhd
+    tb/vhdl/reorder_pkg_test_test.vhd
     tb/vhdl/tb_tb_reorder_col_wide_row_select.vhd
     tb/vhdl/tb_tb_reorder_col.vhd
     tb/vhdl/tb_tb_reorder_col_select_all.vhd