Merge branch 'L2SDP-382' into 'master'

Resolve L2SDP-382

Closes L2SDP-382

See merge request desp/hdl!116

applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.fpga.yaml

@@ -30,6 +30,7 @@ parameters:
   - { name: c_W_beamlet_scale,      value: 16 }
   - { name: c_W_beamlet_resolution, value: 0 - 15 }  # EK: FIXME: support passing on negative values, workaround use 0 - positive
   - { name: c_W_beamlet,            value: 8 }
+  - { name: c_stat_data_sz,         value: 2 }
   - { name: c_nof_clk_per_pps,      value: c_f_adc_MHz * 10**6 }  # = 200000000
 
 peripherals:
@@ -230,6 +231,7 @@ peripherals:
   
   - peripheral_name: reorder/reorder_col_wide
     number_of_peripherals: c_N_beamsets
+    peripheral_span: ceil_pow2(c_P_pfb) * ceil_pow2(c_S_sub_bf * c_Q_fft) * MM_BUS_SIZE  # number_of_ports = c_P_pfb, mm_port_span = ceil_pow2(c_S_sub_bf * c_Q_fft) words
     parameter_overrides:
       - { name: g_wb_factor, value: c_P_pfb }
       - { name: g_nof_ch_in, value: c_N_sub * c_Q_fft }
@@ -239,14 +241,13 @@ peripherals:
 
   - peripheral_name: sdp/sdp_bf_weights
     number_of_peripherals: c_N_beamsets
-    parameter_overrides:
-      - { name: g_nof_instances, value: c_N_pol_bf * c_A_pn }  # A_pn = P_pfb = 6
-      - { name: g_nof_gains, value: c_N_pol * c_S_sub_bf }  # N_pol = Q_fft = 2
+    peripheral_span: ceil_pow2(c_N_pol_bf * c_P_pfb) * ceil_pow2(c_Q_fft * c_S_sub_bf) * MM_BUS_SIZE  # number_of_ports = c_N_pol_bf * c_P_pfb, mm_port_span = ceil_pow2(c_Q_fft * c_S_sub_bf) words
     mm_port_names:
       - RAM_BF_WEIGHTS
 
   - peripheral_name: sdp/sdp_bf_scale
     number_of_peripherals: c_N_beamsets
+    peripheral_span: 2 * MM_BUS_SIZE  # number_of_ports = 1, mm_port_span = 2 words
     parameter_overrides:
       - { name: g_gain_w, value: c_W_beamlet_scale }
       - { name: g_lsb_w, value: 0 - c_W_beamlet_resolution}
@@ -255,11 +256,13 @@ peripherals:
 
   - peripheral_name: sdp/sdp_beamformer_output_hdr_dat
     number_of_peripherals: c_N_beamsets
+    peripheral_span: 64 * MM_BUS_SIZE  # number_of_ports = 1, mm_port_span = 64 words
     mm_port_names:
       - REG_HDR_DAT
 
   - peripheral_name: dp/dp_xonoff
     number_of_peripherals: c_N_beamsets
+    peripheral_span: 2 * MM_BUS_SIZE  # number_of_ports = 1, mm_port_span = 2 words
     parameter_overrides:
       - { name: g_nof_streams, value: 1 }
       - { name: g_combine_streams, value: False }
@@ -267,28 +270,24 @@ peripherals:
       - REG_DP_XONOFF
 
   - peripheral_name: st/st_bst_for_sdp
+    number_of_peripherals: c_N_beamsets
+    peripheral_span: ceil_pow2(c_stat_data_sz * c_S_sub_bf * c_N_pol_bf) * MM_BUS_SIZE  # number_of_ports = 1, mm_port_span = ceil_pow2(c_stat_data_sz * c_S_sub_bf * c_N_pol_bf) words
     mm_port_names:
       - RAM_ST_BST
-      
-  - peripheral_name: common/common_variable_delay
-    peripheral_group: bst0
-    mm_port_names:
-      - REG_STAT_ENABLE_BST_0
 
-  - peripheral_name: sdp/sdp_statistics_offload_hdr_dat_bst
-    peripheral_group: bst0
-    mm_port_names:
-      - REG_STAT_HDR_DAT_BST_0
-      
   - peripheral_name: common/common_variable_delay
-    peripheral_group: bst1
+    peripheral_group: bst
+    number_of_peripherals: c_N_beamsets
+    peripheral_span: 2 * MM_BUS_SIZE  # number_of_ports = 1, mm_port_span = 2 words
     mm_port_names:
-      - REG_STAT_ENABLE_BST_1
+      - REG_STAT_ENABLE_BST
 
   - peripheral_name: sdp/sdp_statistics_offload_hdr_dat_bst
-    peripheral_group: bst1
+    peripheral_group: bst
+    number_of_peripherals: c_N_beamsets
+    peripheral_span: 64 * MM_BUS_SIZE  # number_of_ports = 1, mm_port_span = 64 words
     mm_port_names:
-      - REG_STAT_HDR_DAT_BST_1
+      - REG_STAT_HDR_DAT_BST
 
   - peripheral_name: nw_10GbE/nw_10GbE_unb2legacy
     peripheral_group: beamlet_output

applications/lofar2/libraries/sdp/sdp.peripheral.yaml

@@ -12,6 +12,7 @@ peripherals:
       # MM port for sdp_info.vhd
       - mm_port_name: REG_SDP_INFO
         mm_port_type: REG
+        mm_port_span: 16 * MM_BUS_SIZE
         mm_port_description: |
           "The SDP info contains central SDP information. The station_id applies to the entire station.
            The other info fields apply per antenna band (low band or high band). An FPGA node only
@@ -38,6 +39,7 @@ peripherals:
       # MM port for sdp_info.vhd
       - mm_port_name: REG_CROSSLETS_INFO
         mm_port_type: REG
+        mm_port_span: 16 * MM_BUS_SIZE
         mm_port_description: |
           "The SDP crosslets info contains the step size and 15 offsets, that are used to select a new 
            crosslet subband for every integration interval"
@@ -52,25 +54,28 @@ peripherals:
     peripheral_description: "SDP Subband equalizer coefficients."
     parameters:
       # Parameters of pi_sdp_subband_equalizer.py, fixed in sdp_subband_equalizer.vhd / sdp_pkg.vhd
-      - { name: g_nof_instances, value: 6 }  # P_pfb = S_pn / Q_fft = 12 / 2 = 6
+      - { name: P_pfb, value: 6 }  # P_pfb = S_pn / Q_fft = 12 / 2 = 6
+      - { name: Q_fft, value: 2 }
+      - { name: N_sub, value: 512 }
     mm_ports:
       # MM port for sdp_subband_equalizer.vhd
       - mm_port_name: RAM_EQUALIZER_GAINS
         mm_port_type: RAM
+        mm_port_span: ceil_pow2(Q_fft * N_sub) * MM_BUS_SIZE
         mm_port_description: |
-          "The subband weigths are stored in g_nof_instances = P_pfb = S_pn / Q_fft = 6 blocks of
+          "The subband weigths are stored in P_pfb = S_pn / Q_fft = 6 blocks of
            Q_fft * N_sub = 2 * 512 = 1024 complex coefficients as:
 
            (cint16)subband_weights[S_pn/Q_fft]_[Q_fft][N_sub]
 
            where S_pn = 12, Q_fft = 2 and N_sub = 512 are defined in sdp_pkg.vhd."
-        number_of_mm_ports: g_nof_instances
+        number_of_mm_ports: P_pfb
         fields:
           - - field_name: coef
               field_description: |
                 "Complex coefficient to calibrate the gain and phase per subband. Packed as imaginary in high part,
                  real in low part of mm_width = N_complex * W_sub_weight = 2 * 16 = 32 bit."
-              number_of_fields: 1024  # = Q_fft * N_sub = 2 signal inputs * 512 subbands
+              number_of_fields: Q_fft * N_sub  # = 1024 = 2 signal inputs * 512 subbands
               address_offset: 0x0
               mm_width: 32  # = N_complex * W_sub_weight
               radix: cint16_ir
@@ -80,14 +85,17 @@ peripherals:
     peripheral_description: "SDP Beamformer weights (= beamlet weights)."
     parameters:
       # Parameters of pi_sdp_bf_weights.py, fixed in sdp_bf_weights.vhd / sdp_pkg.vhd
-      - { name: g_nof_instances, value: 12 }  # = N_pol_bf * P_pfb
-      - { name: g_nof_gains, value: 976 }  # = Q_fft * S_sub_bf
+      - { name: N_pol_bf, value: 2 }
+      - { name: P_pfb, value: 6 }  # P_pfb = S_pn / Q_fft = 12 / 2 = 6
+      - { name: Q_fft, value: 2 }
+      - { name: S_sub_bf, value: 488 }
     mm_ports:
       # MM port for sdp_beamformer_local.vhd / sdp_bf_weights.vhd / mms_dp_gain_serial_arr.vhd
       - mm_port_name: RAM_BF_WEIGHTS
         mm_port_type: RAM
+        mm_port_span: ceil_pow2(Q_fft * S_sub_bf) * MM_BUS_SIZE
         mm_port_description: |
-          "The beamlet weigths are stored in g_nof_instances = N_pol_bf * P_pfb = 2 * 6 = 12, where
+          "The beamlet weigths are stored in N_pol_bf * P_pfb = 2 * 6 = 12 instances, where
            P_pfb = S_pn / Q_fft = 6. Per instance there is a block of Q_fft * S_sub_bf =
            2 * 488 = 976 complex BF weights. The N_pol_bf = 2 represents the two beamformer
            polarizations, to distinguish these from the N_pol = 2 antenna polarizations. The
@@ -112,13 +120,13 @@ peripherals:
            when index of N_pol_bf and index of N_pol are the same. The cross-polarization BF
            weights (XY, YX) are set when index of N_pol_bf and index of N_pol are different. If
            no cross-polarization weighting is needed, then these weights can be kept 0."
-        number_of_mm_ports: g_nof_instances
+        number_of_mm_ports: N_pol_bf * P_pfb  # = 12 = 2 beam polarizations * 6 complex PFB units
         fields:
           - - field_name: coef
               field_description: |
                 "Complex weight per subband. Packed as imaginary in high part, real in low part
                  of mm_width = N_complex * W_bf_weight = 2 * 16 = 32 bit."
-              number_of_fields: g_nof_gains
+              number_of_fields: Q_fft * S_sub_bf  # = 976 = 2 signal inputs * 488 beamlets
               address_offset: 0x0
               mm_width: 32  # = N_complex * W_bf_weight
               radix: cint16_ir
@@ -134,6 +142,7 @@ peripherals:
       # MM port for node_sdp_beamformer.vhd / mms_dp_scale.vhd / mms_dp_gain.vhd / mms_dp_gain_arr.vhd
       - mm_port_name: REG_BF_SCALE
         mm_port_type: REG
+        mm_port_span: 2 * MM_BUS_SIZE
         mm_port_description: |
           "The beamlet scale function scales the beamlet sum with a real scale factor and then
            requantizes the result to beamlet data output with less bits.
@@ -151,7 +160,7 @@ peripherals:
               number_of_fields: 1
               address_offset: 0x0
               mm_width: g_gain_w
-              #user_width: g_gain_w           # EK TODO check parameter passing to user_width
+              #user_width: g_gain_w           # EK TODO: check parameter passing to user_width
               radix: uint32          # scale factor is unsigned value
               resolution_w: 0 - g_lsb_w
           - - field_name: unused
@@ -165,6 +174,7 @@ peripherals:
       # MM port for sdp_beamformer_output.vhd / dp_offload_tx_v3.vhd
       - mm_port_name: REG_DP_OFFLOAD_TX_HDR_DAT
         mm_port_type: REG
+        mm_port_span: 64 * MM_BUS_SIZE
         mm_port_description: |
           "The ETH/IP/UDP/application header fields for the beamlet data output offload UDP packets.
 
@@ -240,6 +250,7 @@ peripherals:
       # MM port for sdp_statistics_offload.vhd / dp_offload_tx_v3.vhd
       - mm_port_name: REG_DP_OFFLOAD_TX_HDR_DAT
         mm_port_type: REG
+        mm_port_span: 64 * MM_BUS_SIZE
         mm_port_description: |
           "The ETH/IP/UDP/application header fields for the SST offload UDP packets.
 
@@ -308,6 +319,7 @@ peripherals:
       # MM port for sdp_statistics_offload.vhd / dp_offload_tx_v3.vhd
       - mm_port_name: REG_DP_OFFLOAD_TX_HDR_DAT
         mm_port_type: REG
+        mm_port_span: 64 * MM_BUS_SIZE
         mm_port_description: |
           "The ETH/IP/UDP/application header fields for the BST offload UDP packets.
 
@@ -376,6 +388,7 @@ peripherals:
       # MM port for sdp_statistics_offload.vhd / dp_offload_tx_v3.vhd
       - mm_port_name: REG_DP_OFFLOAD_TX_HDR_DAT
         mm_port_type: REG
+        mm_port_span: 64 * MM_BUS_SIZE
         mm_port_description: |
           "The ETH/IP/UDP/application header fields for the XST offload UDP packets.
 

libraries/base/common/common.peripheral.yaml

@@ -17,6 +17,7 @@ peripherals:
       # MM port for mms_common_variable_delay.vhd / mms_common_reg.vhd
       - mm_port_name: REG_COMMON_VARIABLE_DELAY
         mm_port_type: REG
+        mm_port_span: 2 * MM_BUS_SIZE
         mm_port_description: ""
         fields:
           - - field_name: enable

libraries/base/diag/diag.peripheral.yaml

@@ -15,7 +15,7 @@ peripherals:
       # MM port for diag_wg_wideband_reg.vhd
       - mm_port_name: REG_DIAG_WG
         mm_port_type: REG
-        mm_port_span: 16
+        mm_port_span: 4 * MM_BUS_SIZE
         mm_port_description: "Waveform control."
         number_of_mm_ports: g_nof_streams
         fields:
@@ -52,7 +52,7 @@ peripherals:
       # MM port for mms_diag_wg_wideband.vhd
       - mm_port_name: RAM_DIAG_WG
         mm_port_type: RAM
-        mm_port_span: 4096
+        mm_port_span: 1024 * MM_BUS_SIZE
         mm_port_description: "Waveform buffer."
         number_of_mm_ports: g_nof_streams
         fields:
@@ -74,6 +74,7 @@ peripherals:
       # MM port for mms_diag_data_buffer.vhd
       - mm_port_name: REG_DIAG_DB
         mm_port_type: REG
+        mm_port_span: 2 * MM_BUS_SIZE
         mm_port_description: "Data buffer status."
         number_of_mm_ports: g_nof_streams
         fields:
@@ -88,6 +89,7 @@ peripherals:
       # MM port for mms_diag_data_buffer.vhd
       - mm_port_name: RAM_DIAG_DB
         mm_port_type: RAM
+        mm_port_span: ceil_pow2(g_nof_data * ceil_div(g_data_w, c_word_w)) * MM_BUS_SIZE
         mm_port_description: "Data buffer memory, gets filled after the sync when g_use_in_sync = True, else after the last word was read."
         number_of_mm_ports: g_nof_streams
         fields:

libraries/base/dp/dp.peripheral.yaml

@@ -12,6 +12,7 @@ peripherals:
       # MM port for mms_dp_fifo_to_mm.vhd / dp_fifo_to_mm_reg.vhd
       - mm_port_name: REG_DPMM_CTRL
         mm_port_type: REG
+        mm_port_span: 2 * MM_BUS_SIZE
         mm_port_description: "DPMM = Monitor the DP to MM read FIFO."
         fields:
           - - field_name: rd_usedw
@@ -21,6 +22,7 @@ peripherals:
       # MM port for mms_dp_fifo_to_mm.vhd / dp_fifo_to_mm.vhd
       - mm_port_name: REG_DPMM_DATA   # Use REG_, instead of preferred FIFO_, to match mm_port_name in pi_dpmm.py
         mm_port_type: FIFO
+        mm_port_span: 2 * MM_BUS_SIZE
         mm_port_description: "DPMM = read word from the DP to MM read FIFO"
         fields:
           - - field_name: rd_data
@@ -35,6 +37,7 @@ peripherals:
       # MM port for mms_dp_fifo_from_mm.vhd / dp_fifo_from_mm_reg.vhd
       - mm_port_name: REG_MMDP_CTRL
         mm_port_type: REG
+        mm_port_span: 2 * MM_BUS_SIZE
         mm_port_description: "MMDP = Monitor the MM to DP write FIFO."
         fields:
           - - field_name: wr_usedw
@@ -49,6 +52,7 @@ peripherals:
       # MM port for mms_dp_fifo_from_mm.vhd / dp_fifo_from_mm.vhd
       - mm_port_name: REG_MMDP_DATA   # Use REG_, instead of preferred FIFO_, to match mm_port_name in pi_mmdp.py
         mm_port_type: FIFO
+        mm_port_span: 2 * MM_BUS_SIZE
         mm_port_description: "MMDP = write word to the MM to DP write FIFO."
         fields:
           - - field_name: data
@@ -67,6 +71,7 @@ peripherals:
       # MM port for mms_dp_xonoff.vhd
       - mm_port_name: REG_DP_XONOFF
         mm_port_type: REG
+        mm_port_span: 2 * MM_BUS_SIZE
         mm_port_description: "When g_combine_streams = False then there is one enable bit per stream, else there is one enable bit for all streams."
         fields:
           - - field_name: enable_stream
@@ -90,6 +95,7 @@ peripherals:
       # MM port for dp_shiftram.vhd
       - mm_port_name: REG_DP_SHIFTRAM
         mm_port_type: REG
+        mm_port_span: 2 * MM_BUS_SIZE
         mm_port_description: ""
         number_of_mm_ports: g_nof_streams
         fields:
@@ -109,6 +115,7 @@ peripherals:
       # MM port for dp_bsn_source_reg.vhd
       - mm_port_name: REG_DP_BSN_SOURCE
         mm_port_type: REG
+        mm_port_span: 4 * MM_BUS_SIZE
         mm_port_description: ""
         fields:
           - - field_name: dp_on
@@ -148,6 +155,7 @@ peripherals:
       # MM port for dp_bsn_source_reg_v2.vhd
       - mm_port_name: REG_DP_BSN_SOURCE_V2
         mm_port_type: REG
+        mm_port_span: 8 * MM_BUS_SIZE
         mm_port_description: ""
         fields:
           - - field_name: dp_on
@@ -187,6 +195,7 @@ peripherals:
       # MM port for dp_bsn_scheduler_reg.vhd
       - mm_port_name: REG_DP_BSN_SCHEDULER
         mm_port_type: REG
+        mm_port_span: 2 * MM_BUS_SIZE
         mm_port_description: ""
         fields:
           - - field_name: scheduled_bsn
@@ -206,6 +215,7 @@ peripherals:
       # MM port for dp_bsn_monitor_reg.vhd
       - mm_port_name: REG_DP_BSN_MONITOR
         mm_port_type: REG
+        mm_port_span: 16 * MM_BUS_SIZE
         mm_port_description: ""
         number_of_mm_ports: g_nof_streams
         fields:
@@ -266,6 +276,7 @@ peripherals:
       # MM port for dp_bsn_monitor_reg_v2.vhd
       - mm_port_name: REG_DP_BSN_MONITOR_V2
         mm_port_type: REG
+        mm_port_span: 8 * MM_BUS_SIZE
         mm_port_description: ""
         number_of_mm_ports: g_nof_streams
         fields:
@@ -317,6 +328,7 @@ peripherals:
       # MM port for dp_selector_arr.vhd
       - mm_port_name: REG_DP_SELECTOR
         mm_port_type: REG
+        mm_port_span: 2 * MM_BUS_SIZE
         mm_port_description: ""
         fields:
           - - field_name: input_select
@@ -334,6 +346,7 @@ peripherals:
       # MM port for dp_sync_insert_v2.vhd
       - mm_port_name: REG_DP_SYNC_INSERT_V2
         mm_port_type: REG
+        mm_port_span: 2 * MM_BUS_SIZE
         mm_port_description: ""
         fields:
           - - field_name: nof_blk_per_sync

libraries/base/reorder/reorder.peripheral.yaml

@@ -23,6 +23,7 @@ peripherals:
       # MM port for reorder_col_wide.vhd / reorder_col.vhd
       - mm_port_name: RAM_SS_SS_WIDE
         mm_port_type: RAM
+        mm_port_span: ceil_pow2(g_nof_ch_sel) * MM_BUS_SIZE
         mm_port_description: ""
         number_of_mm_ports: g_wb_factor
         fields:

libraries/dsp/filter/filter.peripheral.yaml

@@ -34,6 +34,7 @@ peripherals:
       # MM port for fil_ppf_wide.vhd / fil_ppf_single.vhd
       - mm_port_name: RAM_FIL_COEFS
         mm_port_type: RAM
+        mm_port_span: ceil_pow2(g_fil_ppf.nof_bands / g_fil_ppf.wb_factor) * MM_BUS_SIZE
         mm_port_description: |
            "The FIR filter coefficients are stored in blocks of g_fil_ppf.nof_bands/g_fil_ppf.wb_factor
             real coefficients:

libraries/dsp/st/st.peripheral.yaml

@@ -23,6 +23,7 @@ peripherals:
       # MM port for st_sst.vhd
       - mm_port_name: RAM_ST_SST
         mm_port_type: RAM
+        mm_port_span: ceil_pow2(g_stat_data_sz * g_nof_stat) * MM_BUS_SIZE
         mm_port_description: |
            "The statistics are calculated for blocks of g_nof_stat time multiplexed data streams.
             There are g_nof_instances parallel time multiplexed data streams.
@@ -54,6 +55,7 @@ peripherals:
       # MM port for st_sst.vhd
       - mm_port_name: RAM_ST_SST
         mm_port_type: RAM
+        mm_port_span: ceil_pow2(g_stat_data_sz * g_nof_stat) * MM_BUS_SIZE
         mm_port_description: |
           "The subband statistics per PN are stored in g_nof_instances = P_pfb = S_pn / Q_fft = 6 blocks of 
            N_sub * Q_fft = 512 * 2 = 1024 real values as:
@@ -86,6 +88,7 @@ peripherals:
       # MM port for st_sst.vhd
       - mm_port_name: RAM_ST_SST
         mm_port_type: RAM
+        mm_port_span: ceil_pow2(g_stat_data_sz * g_nof_stat) * MM_BUS_SIZE
         mm_port_description: |
           "The beamlet statistics per PN are stored in 1 block of S_sub_bf * N_pol_bf = 488 * 2 = 976 real values as:
 

libraries/io/aduh/aduh.peripheral.yaml

@@ -15,6 +15,7 @@ peripherals:
       # MM port for mms_aduh_monitor_arr.vhd / aduh_monitor_reg.vhd
       - mm_port_name: REG_ADUH_MON
         mm_port_type: REG
+        mm_port_span: 4 * MM_BUS_SIZE
         mm_port_description: "Sum of samples and sample powers during a sync interval."
         number_of_mm_ports: g_nof_streams
         fields:
@@ -44,6 +45,7 @@ peripherals:
       # MM port for mms_aduh_monitor_arr.vhd
       - mm_port_name: RAM_ADUH_MON
         mm_port_type: RAM
+        mm_port_span: ceil_pow2(g_buffer_nof_symbols / g_nof_symbols_per_data) * MM_BUS_SIZE
         mm_port_description: "Data buffer memory, gets filled after the sync when g_buffer_use_sync = True, else after the last word was read."
         number_of_mm_ports: g_nof_streams
         fields: