g_clock_stretch_sense -> g_clock_stretch_sense_scl

libraries/io/i2c/src/vhdl/i2c_byte.vhd

@@ -95,7 +95,7 @@ use ieee.std_logic_arith.all;
 
 entity i2c_byte is
   GENERIC (
-    g_clock_stretch_sense : BOOLEAN := FALSE
+    g_clock_stretch_sense_scl : BOOLEAN := FALSE
   );
   port (
     clk    : in std_logic;
@@ -207,7 +207,7 @@ architecture structural of i2c_byte is
 
 begin
   -- hookup bit_controller
-  gen_bit_ctrl : IF g_clock_stretch_sense=FALSE GENERATE
+  gen_bit_ctrl : IF g_clock_stretch_sense_scl=FALSE GENERATE
     bit_ctrl: i2c_bit port map(
       clk     => clk,
       rst     => rst,
@@ -228,7 +228,7 @@ begin
       sda_oen => sda_oen
     );
   END GENERATE;
-  gen_bit_ctrl_scl_sense : IF g_clock_stretch_sense=TRUE GENERATE
+  gen_bit_ctrl_scl_sense : IF g_clock_stretch_sense_scl=TRUE GENERATE
     bit_ctrl_scl_sense: i2c_bit_scl_sense port map(
       clk     => clk,
       rst     => rst,

libraries/io/i2c/src/vhdl/i2c_smbus.vhd

@@ -30,8 +30,8 @@ USE work.i2c_smbus_pkg.ALL;
 
 ENTITY i2c_smbus is
   GENERIC (
-    g_i2c_phy             : t_c_i2c_phy;
-    g_clock_stretch_sense : BOOLEAN := FALSE
+    g_i2c_phy                 : t_c_i2c_phy;
+    g_clock_stretch_sense_scl : BOOLEAN := FALSE
   );
   port (
     -- GENERIC Signal
@@ -166,11 +166,11 @@ BEGIN
   -- support for slow slave or multi master bus arbitriation, but that is acceptable, because these features are
   -- not used for RCU and TDS in LOFAR.
 
-  gen_i2c_smbus_scl_oe_comma_reg : IF g_clock_stretch_sense=FALSE GENERATE
+  gen_i2c_smbus_scl_oe_comma_reg : IF g_clock_stretch_sense_scl=FALSE GENERATE
     scl_i <= NOT scl_oe_comma_reg;
   END GENERATE;
 
-  gen_i2c_smbus_scl : IF g_clock_stretch_sense=TRUE GENERATE
+  gen_i2c_smbus_scl : IF g_clock_stretch_sense_scl=TRUE GENERATE
     scl_i <= scl;
   END GENERATE;
 
@@ -195,7 +195,7 @@ BEGIN
 
   byte : ENTITY work.i2c_byte
   GENERIC MAP (
-    g_clock_stretch_sense => g_clock_stretch_sense
+    g_clock_stretch_sense_scl => g_clock_stretch_sense_scl
   )
   PORT MAP (
     clk         => clk,