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RTSD
HDL
Commits
b502cb01
Commit
b502cb01
authored
3 years ago
by
Eric Kooistra
Browse files
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Added g_empty to support verifing any empty size < nof symbols per word.
parent
1ad6f09d
Branches
Branches containing commit
No related tags found
1 merge request
!195
Resolve L2SDP-564
Changes
2
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2 changed files
libraries/base/dp/tb/vhdl/tb_dp_offload_tx_v3.vhd
+22
-8
22 additions, 8 deletions
libraries/base/dp/tb/vhdl/tb_dp_offload_tx_v3.vhd
libraries/base/dp/tb/vhdl/tb_tb_dp_offload_tx_v3.vhd
+13
-9
13 additions, 9 deletions
libraries/base/dp/tb/vhdl/tb_tb_dp_offload_tx_v3.vhd
with
35 additions
and
17 deletions
libraries/base/dp/tb/vhdl/tb_dp_offload_tx_v3.vhd
+
22
−
8
View file @
b502cb01
...
@@ -74,7 +74,8 @@ ENTITY tb_dp_offload_tx_v3 IS
...
@@ -74,7 +74,8 @@ ENTITY tb_dp_offload_tx_v3 IS
g_print_en
:
BOOLEAN
:
=
TRUE
;
g_print_en
:
BOOLEAN
:
=
TRUE
;
-- specific
-- specific
g_data_w
:
NATURAL
:
=
64
;
g_data_w
:
NATURAL
:
=
64
;
g_symbol_w
:
NATURAL
:
=
32
;
g_symbol_w
:
NATURAL
:
=
8
;
g_empty
:
NATURAL
:
=
6
;
-- number of empty symbols in header when g_symbol_w < g_data_w, must be < c_nof_symbols_per_data
g_pkt_len
:
NATURAL
:
=
240
;
g_pkt_len
:
NATURAL
:
=
240
;
g_pkt_gap
:
NATURAL
:
=
16
g_pkt_gap
:
NATURAL
:
=
16
);
);
...
@@ -95,7 +96,7 @@ ARCHITECTURE tb OF tb_dp_offload_tx_v3 IS
...
@@ -95,7 +96,7 @@ ARCHITECTURE tb OF tb_dp_offload_tx_v3 IS
CONSTANT
c_nof_symbols_per_bsn
:
NATURAL
:
=
c_dp_stream_bsn_w
/
g_symbol_w
;
-- = 64 / g_symbol_w
CONSTANT
c_nof_symbols_per_bsn
:
NATURAL
:
=
c_dp_stream_bsn_w
/
g_symbol_w
;
-- = 64 / g_symbol_w
CONSTANT
c_bsn_w
:
NATURAL
:
=
sel_a_b
(
c_nof_symbols_per_data
=
1
,
CONSTANT
c_bsn_w
:
NATURAL
:
=
sel_a_b
(
c_nof_symbols_per_data
=
1
,
g_symbol_w
*
c_nof_symbols_per_bsn
,
g_symbol_w
*
c_nof_symbols_per_bsn
,
g_symbol_w
*
(
c_nof_symbols_per_bsn
-
1
));
g_symbol_w
*
(
c_nof_symbols_per_bsn
-
g_empty
));
CONSTANT
c_use_shortened_header
:
BOOLEAN
:
=
c_bsn_w
<=
c_word_w
;
CONSTANT
c_use_shortened_header
:
BOOLEAN
:
=
c_bsn_w
<=
c_word_w
;
-- dp_stream_stimuli
-- dp_stream_stimuli
...
@@ -116,6 +117,7 @@ ARCHITECTURE tb OF tb_dp_offload_tx_v3 IS
...
@@ -116,6 +117,7 @@ ARCHITECTURE tb OF tb_dp_offload_tx_v3 IS
CONSTANT
c_expected_pkt_len
:
NATURAL
:
=
g_pkt_len
;
CONSTANT
c_expected_pkt_len
:
NATURAL
:
=
g_pkt_len
;
CONSTANT
c_sync_period
:
NATURAL
:
=
5
;
CONSTANT
c_sync_period
:
NATURAL
:
=
5
;
CONSTANT
c_sync_offset
:
NATURAL
:
=
2
;
CONSTANT
c_sync_offset
:
NATURAL
:
=
2
;
CONSTANT
c_data_init
:
NATURAL
:
=
17
;
CONSTANT
c_bsn_init
:
STD_LOGIC_VECTOR
(
c_dp_stream_bsn_w
-1
DOWNTO
0
)
:
=
TO_DP_BSN
(
0
);
CONSTANT
c_bsn_init
:
STD_LOGIC_VECTOR
(
c_dp_stream_bsn_w
-1
DOWNTO
0
)
:
=
TO_DP_BSN
(
0
);
CONSTANT
c_nof_sync
:
NATURAL
:
=
3
;
CONSTANT
c_nof_sync
:
NATURAL
:
=
3
;
CONSTANT
c_nof_packets
:
NATURAL
:
=
c_sync_period
*
c_nof_sync
;
CONSTANT
c_nof_packets
:
NATURAL
:
=
c_sync_period
*
c_nof_sync
;
...
@@ -190,7 +192,7 @@ ARCHITECTURE tb OF tb_dp_offload_tx_v3 IS
...
@@ -190,7 +192,7 @@ ARCHITECTURE tb OF tb_dp_offload_tx_v3 IS
X"0000001B"
);
-- 25 = eth_dst_mac[47:32]
X"0000001B"
);
-- 25 = eth_dst_mac[47:32]
CONSTANT
c_expected_tx_hdr_word_arr_shortened
:
t_slv_32_arr
(
0
TO
c_udp_offload_nof_hdr_words_shortened
-1
)
:
=
(
-- word address
CONSTANT
c_expected_tx_hdr_word_arr_shortened
:
t_slv_32_arr
(
0
TO
c_udp_offload_nof_hdr_words_shortened
-1
)
:
=
(
-- word address
X"00000000"
,
-- 0 = dp_bsn[
31:0]
-- readback is MM value, not the logic value
X"00000000"
,
-- 0 = dp_bsn[
c_bsn_w-1:0]
-- readback is MM value, not the logic value
X"00000000"
,
-- 1 = dp_sync
X"00000000"
,
-- 1 = dp_sync
X"03040506"
,
-- 2 = dp_reserved[31:0]
X"03040506"
,
-- 2 = dp_reserved[31:0]
X"00000102"
,
-- 3 = dp_reserved[47:32]
X"00000102"
,
-- 3 = dp_reserved[47:32]
...
@@ -246,7 +248,7 @@ ARCHITECTURE tb OF tb_dp_offload_tx_v3 IS
...
@@ -246,7 +248,7 @@ ARCHITECTURE tb OF tb_dp_offload_tx_v3 IS
X"0000001B"
);
-- 25 = eth_dst_mac[47:32]
X"0000001B"
);
-- 25 = eth_dst_mac[47:32]
CONSTANT
c_expected_rx_hdr_word_arr_shortened
:
t_slv_32_arr
(
0
TO
c_udp_offload_nof_hdr_words_shortened
-1
)
:
=
(
-- word address
CONSTANT
c_expected_rx_hdr_word_arr_shortened
:
t_slv_32_arr
(
0
TO
c_udp_offload_nof_hdr_words_shortened
-1
)
:
=
(
-- word address
X"00000002"
,
-- 0 = dp_bsn[
31:0]
-- dynamic value obtained from simulation
X"00000002"
,
-- 0 = dp_bsn[
c_bsn_w-1:0]
-- dynamic value obtained from simulation
X"00000001"
,
-- 1 = dp_sync -- dynamic value obtained from simulation
X"00000001"
,
-- 1 = dp_sync -- dynamic value obtained from simulation
X"03040506"
,
-- 2 = dp_reserved[31:0]
X"03040506"
,
-- 2 = dp_reserved[31:0]
X"00000102"
,
-- 3 = dp_reserved[47:32]
X"00000102"
,
-- 3 = dp_reserved[47:32]
...
@@ -366,6 +368,7 @@ BEGIN
...
@@ -366,6 +368,7 @@ BEGIN
-- initializations
-- initializations
g_sync_period
=>
c_sync_period
,
g_sync_period
=>
c_sync_period
,
g_sync_offset
=>
c_sync_offset
,
g_sync_offset
=>
c_sync_offset
,
g_data_init
=>
c_data_init
,
g_bsn_init
=>
c_bsn_init
,
g_bsn_init
=>
c_bsn_init
,
-- specific
-- specific
g_in_dat_w
=>
g_data_w
,
g_in_dat_w
=>
g_data_w
,
...
@@ -563,7 +566,16 @@ BEGIN
...
@@ -563,7 +566,16 @@ BEGIN
link_offload_sosi_arr
(
0
)
.
sop
<=
tx_offload_sosi_arr
(
0
)
.
sop
;
link_offload_sosi_arr
(
0
)
.
sop
<=
tx_offload_sosi_arr
(
0
)
.
sop
;
link_offload_sosi_arr
(
0
)
.
eop
<=
tx_offload_sosi_arr
(
0
)
.
eop
;
link_offload_sosi_arr
(
0
)
.
eop
<=
tx_offload_sosi_arr
(
0
)
.
eop
;
tx_offload_siso_arr
<=
(
OTHERS
=>
c_dp_siso_rdy
);
-- The dp_offload_tx_v3 cannot accept flow control via its src_in_arr
-- however the dp_offload_rx only lowers ready at eop, to request a
-- one cycle gap between rx packets. The dp_offload_tx_v3 output via
-- src_out_arr has a gap, when g_flow_control_stimuli is e_pulse or when
-- g_pkt_gap > 0. The dp_offload_tx_v3 output has gaps, even when the
-- input stimuli have no gaps. Hence the flow control from dp_offload_rx
-- at the eop has no impact. However the tb will still eventually fail
-- the stimuli is always active, because then the u_dp_fifo_sc will run
-- full.
tx_offload_siso_arr
<=
link_offload_siso_arr
;
--(OTHERS=>c_dp_siso_rdy);
END
PROCESS
;
END
PROCESS
;
------------------------------------------------------------------------------
------------------------------------------------------------------------------
...
@@ -664,16 +676,18 @@ BEGIN
...
@@ -664,16 +676,18 @@ BEGIN
END
PROCESS
;
END
PROCESS
;
p_verify_snk_in_data
:
PROCESS
p_verify_snk_in_data
:
PROCESS
VARIABLE
v_data
:
INTEGER
;
BEGIN
BEGIN
-- Note: This verification overlaps with u_dp_stream_verify because that also verifies incrementing valid data.
-- Note: This verification overlaps with u_dp_stream_verify because that also verifies incrementing valid data.
WAIT
UNTIL
rising_edge
(
dp_clk
);
WAIT
UNTIL
rising_edge
(
dp_clk
);
prev_verify_snk_in_data
<=
verify_snk_in
.
data
(
g_data_w
-1
DOWNTO
0
);
prev_verify_snk_in_data
<=
verify_snk_in
.
data
(
g_data_w
-1
DOWNTO
0
);
v_data
:
=
TO_UINT
(
verify_snk_in
.
data
)
-
c_data_init
;
IF
verify_snk_in
.
sop
=
'1'
THEN
IF
verify_snk_in
.
sop
=
'1'
THEN
ASSERT
TO_UINT
(
verify_snk_in
.
data
)
MOD
g_pkt_len
=
0
REPORT
"Wrong decoded data at sop."
SEVERITY
ERROR
;
ASSERT
v_
data
MOD
g_pkt_len
=
0
REPORT
"Wrong decoded data at sop."
SEVERITY
ERROR
;
ELSIF
verify_snk_in
.
eop
=
'1'
THEN
ELSIF
verify_snk_in
.
eop
=
'1'
THEN
ASSERT
TO_UINT
(
verify_snk_in
.
data
)
MOD
g_pkt_len
=
g_pkt_len
-
1
REPORT
"Wrong decoded data at eop."
SEVERITY
ERROR
;
ASSERT
v_
data
MOD
g_pkt_len
=
g_pkt_len
-
1
REPORT
"Wrong decoded data at eop."
SEVERITY
ERROR
;
ELSIF
verify_snk_in
.
valid
=
'1'
THEN
ELSIF
verify_snk_in
.
valid
=
'1'
THEN
ASSERT
TO_UINT
(
verify_snk_in
.
data
)
=
TO_UINT
(
prev_verify_snk_in_data
)
+
1
REPORT
"Wrong decoded data at valid."
SEVERITY
ERROR
;
ASSERT
v_
data
=
TO_UINT
(
prev_verify_snk_in_data
)
-
c_data_init
+
1
REPORT
"Wrong decoded data at valid."
SEVERITY
ERROR
;
END
IF
;
END
IF
;
END
PROCESS
;
END
PROCESS
;
...
...
This diff is collapsed.
Click to expand it.
libraries/base/dp/tb/vhdl/tb_tb_dp_offload_tx_v3.vhd
+
13
−
9
View file @
b502cb01
...
@@ -44,17 +44,21 @@ BEGIN
...
@@ -44,17 +44,21 @@ BEGIN
-- -- specific
-- -- specific
-- g_data_w : NATURAL := 64;
-- g_data_w : NATURAL := 64;
-- g_symbol_w : NATURAL := 16;
-- g_symbol_w : NATURAL := 16;
-- g_empty : NATURAL := 6; -- number of empty symbols in header when g_symbol_w < g_data_w, must be < c_nof_symbols_per_data
-- g_pkt_len : NATURAL := 240;
-- g_pkt_len : NATURAL := 240;
-- g_pkt_gap : NATURAL := 16
-- g_pkt_gap : NATURAL := 16
u_pls_act_data_w_64
:
ENTITY
work
.
tb_dp_offload_tx_v3
GENERIC
MAP
(
e_pulse
,
e_active
,
FALSE
,
64
,
64
,
240
,
16
);
u_pls_act_data_w_64
:
ENTITY
work
.
tb_dp_offload_tx_v3
GENERIC
MAP
(
e_pulse
,
e_active
,
FALSE
,
64
,
64
,
0
,
240
,
16
);
u_pls_act_data_w_64_no_gap
:
ENTITY
work
.
tb_dp_offload_tx_v3
GENERIC
MAP
(
e_pulse
,
e_active
,
FALSE
,
64
,
64
,
240
,
0
);
u_act_act_data_w_64_no_gap
:
ENTITY
work
.
tb_dp_offload_tx_v3
GENERIC
MAP
(
e_active
,
e_active
,
FALSE
,
64
,
64
,
0
,
240
,
0
);
-- u_dp_fifo_sc does run almost full
u_rnd_act_data_w_64
:
ENTITY
work
.
tb_dp_offload_tx_v3
GENERIC
MAP
(
e_random
,
e_active
,
FALSE
,
64
,
64
,
240
,
16
);
u_pls_act_data_w_64_no_gap
:
ENTITY
work
.
tb_dp_offload_tx_v3
GENERIC
MAP
(
e_pulse
,
e_active
,
FALSE
,
64
,
64
,
0
,
240
,
0
);
u_rnd_act_data_w_32
:
ENTITY
work
.
tb_dp_offload_tx_v3
GENERIC
MAP
(
e_random
,
e_active
,
FALSE
,
32
,
32
,
240
,
16
);
u_rnd_act_data_w_64
:
ENTITY
work
.
tb_dp_offload_tx_v3
GENERIC
MAP
(
e_random
,
e_active
,
FALSE
,
64
,
64
,
0
,
240
,
16
);
--u_act_rnd_data_w : ENTITY work.tb_dp_offload_tx_v3 GENERIC MAP (e_active, e_random, FALSE, 64, 64, 240, 16);
u_rnd_act_data_w_32
:
ENTITY
work
.
tb_dp_offload_tx_v3
GENERIC
MAP
(
e_random
,
e_active
,
FALSE
,
32
,
32
,
0
,
240
,
16
);
u_rnd_act_data_64_symbol_16
:
ENTITY
work
.
tb_dp_offload_tx_v3
GENERIC
MAP
(
e_random
,
e_active
,
FALSE
,
64
,
16
,
240
,
16
);
--u_act_rnd_data_w : ENTITY work.tb_dp_offload_tx_v3 GENERIC MAP (e_active, e_random, FALSE, 64, 64, 0, 240, 16); -- dp_offload_rx requires e_active
u_rnd_act_data_64_symbol_32
:
ENTITY
work
.
tb_dp_offload_tx_v3
GENERIC
MAP
(
e_random
,
e_active
,
FALSE
,
64
,
32
,
240
,
16
);
u_rnd_act_data_64_symbol_8_empty_1
:
ENTITY
work
.
tb_dp_offload_tx_v3
GENERIC
MAP
(
e_random
,
e_active
,
FALSE
,
64
,
8
,
1
,
240
,
16
);
u_rnd_act_data_32_symbol_8
:
ENTITY
work
.
tb_dp_offload_tx_v3
GENERIC
MAP
(
e_random
,
e_active
,
FALSE
,
32
,
8
,
240
,
16
);
u_rnd_act_data_64_symbol_8_empty_6
:
ENTITY
work
.
tb_dp_offload_tx_v3
GENERIC
MAP
(
e_random
,
e_active
,
FALSE
,
64
,
8
,
6
,
240
,
16
);
u_rnd_act_data_32_symbol_16
:
ENTITY
work
.
tb_dp_offload_tx_v3
GENERIC
MAP
(
e_random
,
e_active
,
FALSE
,
32
,
16
,
240
,
16
);
u_rnd_act_data_64_symbol_16
:
ENTITY
work
.
tb_dp_offload_tx_v3
GENERIC
MAP
(
e_random
,
e_active
,
FALSE
,
64
,
16
,
1
,
240
,
16
);
u_rnd_act_data_64_symbol_32
:
ENTITY
work
.
tb_dp_offload_tx_v3
GENERIC
MAP
(
e_random
,
e_active
,
FALSE
,
64
,
32
,
1
,
240
,
16
);
u_rnd_act_data_32_symbol_8
:
ENTITY
work
.
tb_dp_offload_tx_v3
GENERIC
MAP
(
e_random
,
e_active
,
FALSE
,
32
,
8
,
1
,
240
,
16
);
u_rnd_act_data_32_symbol_16
:
ENTITY
work
.
tb_dp_offload_tx_v3
GENERIC
MAP
(
e_random
,
e_active
,
FALSE
,
32
,
16
,
1
,
240
,
16
);
END
tb
;
END
tb
;
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