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Commit b4896117 authored by Pepping's avatar Pepping
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Start the block gen already before the DDR is ready to check if the flushing works OK.

parent cbbf6ac7
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...@@ -178,14 +178,14 @@ if __name__ == "__main__": ...@@ -178,14 +178,14 @@ if __name__ == "__main__":
t=t*2 t=t*2
bg_data = flatten(bg_data) bg_data = flatten(bg_data)
# Enable the blockgenerator
bg.write_enable()
# Wait until the DDR3 model is initialized. # Wait until the DDR3 model is initialized.
if tc.sim == True: if tc.sim == True:
do_until_gt(io.simIO.getSimTime, ms_retry=1000, val=110000, s_timeout=13600) # 110000 do_until_gt(io.simIO.getSimTime, ms_retry=1000, val=110000, s_timeout=13600) # 110000
# Enable the blockgenerator
bg.write_enable()
if(c_force_late_sync == 1): if(c_force_late_sync == 1):
if tc.sim == True: if tc.sim == True:
do_until_gt(io.simIO.getSimTime, ms_retry=1000, val=180000, s_timeout=13600) # 110000 do_until_gt(io.simIO.getSimTime, ms_retry=1000, val=180000, s_timeout=13600) # 110000
......
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