Corrected double ;;. Renamed u_phy_gx into u_tech_transceiver_gx.

libraries/io/tr_nonbonded/src/vhdl/tr_nonbonded.vhd

@@ -20,7 +20,7 @@
 --
 --------------------------------------------------------------------------------
 
-LIBRARY IEEE, common_lib, dp_lib, technology_lib, tech_transceiver_lib;;
+LIBRARY IEEE, common_lib, dp_lib, technology_lib, tech_transceiver_lib;
 USE IEEE.STD_LOGIC_1164.ALL;
 USE IEEE.STD_LOGIC_UNSIGNED.ALL;
 USE IEEE.NUMERIC_STD.ALL;
@@ -124,8 +124,8 @@ BEGIN
   gp_out <= gp_out_tx & gp_out_rx;  
 
   gen_phy: IF g_sim = FALSE OR g_sim_level = 0 GENERATE
-    -- Altera's IP
-    u_phy_gx: ENTITY tech_transceiver_lib.tech_transceiver_gx 
+    -- PHY IP
+    u_tech_transceiver_gx: ENTITY tech_transceiver_lib.tech_transceiver_gx 
     GENERIC MAP (
       g_technology    => g_technology,
       g_data_w        => g_data_w,