Use c_eth_tester_sync_timeout.

libraries/io/eth/src/vhdl/eth_tester.vhd

@@ -38,7 +38,7 @@ USE work.eth_tester_pkg.ALL;
 ENTITY eth_tester IS
   GENERIC (
     g_nof_streams      : NATURAL := 1;
-    g_bg_sync_timeout  : NATURAL := 220*10**6;  -- 10% margin for nominal 1 s with st_clk at 200MHz
+    g_bg_sync_timeout  : NATURAL := c_eth_tester_sync_timeout;
     g_remove_crc       : BOOLEAN := TRUE  -- use TRUE when using sim_tse and tech_tse link interface,
                                           -- use FALSE when streaming link interface
   );

libraries/io/eth/tb/vhdl/tb_eth_tester.vhd

@@ -540,6 +540,7 @@ BEGIN
   dut : ENTITY work.eth_tester
   GENERIC MAP (
     g_nof_streams      => g_nof_streams,
+    g_bg_sync_timeout  => c_eth_tester_sync_timeout,
     g_remove_crc       => g_loopback_eth  -- remove CRC inserted by TSE (sim or tech)
   )
   PORT MAP (