Skip to content
GitLab
Explore
Sign in
Primary navigation
Search or go to…
Project
H
HDL
Manage
Activity
Members
Labels
Plan
Issues
Issue boards
Milestones
Iterations
Wiki
Requirements
Jira
Code
Merge requests
Repository
Branches
Commits
Tags
Repository graph
Compare revisions
Snippets
Locked files
Build
Pipelines
Jobs
Pipeline schedules
Test cases
Artifacts
Deploy
Releases
Container registry
Model registry
Operate
Environments
Monitor
Incidents
Analyze
Value stream analytics
Contributor analytics
CI/CD analytics
Repository analytics
Code review analytics
Issue analytics
Insights
Model experiments
Help
Help
Support
GitLab documentation
Compare GitLab plans
Community forum
Contribute to GitLab
Provide feedback
Keyboard shortcuts
?
Snippets
Groups
Projects
Show more breadcrumbs
RTSD
HDL
Commits
ac5cd3f9
Commit
ac5cd3f9
authored
10 years ago
by
Daniel van der Schuur
Browse files
Options
Downloads
Patches
Plain Diff
-Stripped compare method.
parent
52c33b20
No related branches found
No related tags found
No related merge requests found
Changes
1
Hide whitespace changes
Inline
Side-by-side
Showing
1 changed file
libraries/dsp/correlator/tb/python/verify_correlator.py
+6
-30
6 additions, 30 deletions
libraries/dsp/correlator/tb/python/verify_correlator.py
with
6 additions
and
30 deletions
libraries/dsp/correlator/tb/python/verify_correlator.py
+
6
−
30
View file @
ac5cd3f9
...
...
@@ -18,10 +18,8 @@
# along with this program. If not, see <http://www.gnu.org/licenses/>.
#
###############################################################################
import
sys
from
common
import
*
#import matplotlib
#matplotlib.use('TkAgg')
from
common_dsp
import
*
from
mem_init_file
import
list_to_hex
...
...
@@ -307,41 +305,19 @@ correlator_src_out_arr_ref = correlate(correlator_snk_in_arr_int, INTEGRATION_PE
# Read test bench output file written by dp_stream_rec_play.vhd
correlator_src_out_arr
=
rec_file_to_complex
(
REC_FILE
,
complex_width
=
CORRELATOR_OUTPUT_COMPLEX_WIDTH
)
def
nozero
(
input_nr
):
"""
Returns a/b when b is non-zero. Otherwise returns almost zero.
"""
if
not
(
input_nr
==
0
):
return
input_nr
else
:
return
0.00000000000000000000000000000000000001
import
sys
def
compare_correlator_src_out_arr
(
vhdl_out
,
model_out
,
max_deviation_factor
):
def
compare_correlator_src_out_arr
(
vhdl_out
,
model_out
):
"""
Compare the VHDL correlator
'
s output to the Python model output.
. A max_deviation_factor (0..1) is allowed in both the real and the imaginary
values -> 1% max = 0.01
. A too great deviation results in a False being returned.
"""
passed
=
True
channel_nr
=
0
for
vhdl_channel
,
model_channel
in
zip
(
vhdl_out
,
model_out
):
vis_nr
=
0
for
vhdl_visibility
,
model_visibility
in
zip
(
vhdl_channel
,
model_channel
):
diff_re
=
abs
(
model_visibility
.
real
-
vhdl_visibility
.
real
)
/
nozero
(
abs
(
model_visibility
.
real
))
diff_im
=
abs
(
model_visibility
.
imag
-
vhdl_visibility
.
imag
)
/
nozero
(
abs
(
model_visibility
.
imag
))
if
diff_re
>
max_deviation_factor
or
diff_im
>
max_deviation_factor
:
if
not
(
vhdl_visibility
==
model_visibility
):
print
'
compare_correlator_src_out_arr: FAILED
'
print
'
. channel
'
,
channel_nr
,
'
visibility
'
,
vis_nr
print
'
. diff_re
'
,
diff_re
print
'
. model_visibility.real
'
,
model_visibility
.
real
print
'
. vhdl_visibility.real
'
,
vhdl_visibility
.
real
print
'
. diff_im
'
,
diff_im
print
'
. model_visibility.imag
'
,
model_visibility
.
imag
print
'
. vhdl_visibility.imag
'
,
vhdl_visibility
.
imag
print
'
. model:
'
,
model_visibility
print
'
. VHDL :
'
,
vhdl_visibility
sys
.
exit
()
vis_nr
+=
1
channel_nr
+=
1
...
...
@@ -349,7 +325,7 @@ def compare_correlator_src_out_arr(vhdl_out, model_out, max_deviation_factor):
print
'
corr out
'
,
correlator_src_out_arr
[
0
]
print
'
corr ref
'
,
correlator_src_out_arr_ref
[
0
]
compare_correlator_src_out_arr
(
correlator_src_out_arr
,
correlator_src_out_arr_ref
,
0.001
)
compare_correlator_src_out_arr
(
correlator_src_out_arr
,
correlator_src_out_arr_ref
)
def
plot_phase_shifts
(
correlator_output
):
"""
...
...
This diff is collapsed.
Click to expand it.
Preview
0%
Loading
Try again
or
attach a new file
.
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Save comment
Cancel
Please
register
or
sign in
to comment