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RTSD
HDL
Commits
a8354eea
Commit
a8354eea
authored
10 years ago
by
Eric Kooistra
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Added copy files for Modelsim. Added modelsim_search_libraries key for -L {} option in simulation.
parent
17ad00f7
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1 changed file
tools/oneclick/base/modelsim_config.py
+14
-3
14 additions, 3 deletions
tools/oneclick/base/modelsim_config.py
with
14 additions
and
3 deletions
tools/oneclick/base/modelsim_config.py
+
14
−
3
View file @
a8354eea
...
@@ -210,7 +210,14 @@ class ModelsimConfig(hdl_config.HdlConfig):
...
@@ -210,7 +210,14 @@ class ModelsimConfig(hdl_config.HdlConfig):
# - simulation configurations
# - simulation configurations
fp
.
write
(
'
Project_Sim_Count = %d
\n
'
%
len
(
test_bench_files
))
fp
.
write
(
'
Project_Sim_Count = %d
\n
'
%
len
(
test_bench_files
))
project_sim_p_defaults
=
'
Generics {} timing default -std_output {} -nopsl 0 +notimingchecks 0 -L {} selected_du {} -hazards 0 -sdf {} ok 1 -0in 0 -nosva 0 +pulse_r {} -absentisempty 0 -multisource_delay {} +pulse_e {} vopt_env 1 -coverage 0 -sdfnoerror 0 +plusarg {} -vital2.2b 0 -t default -memprof 0 is_vopt_flow 0 -noglitch 0 -nofileshare 0 -wlf {} -assertdebug 0 +no_pulse_msg 0 -0in_options {} -assertfile {} -sdfnowarn 0 -Lf {} -std_input {}
'
project_sim_p_defaults
=
'
Generics {} timing default -std_output {} -nopsl 0 +notimingchecks 0 selected_du {} -hazards 0 -sdf {} ok 1 -0in 0 -nosva 0 +pulse_r {} -absentisempty 0 -multisource_delay {} +pulse_e {} vopt_env 1 -coverage 0 -sdfnoerror 0 +plusarg {} -vital2.2b 0 -t default -memprof 0 is_vopt_flow 0 -noglitch 0 -nofileshare 0 -wlf {} -assertdebug 0 +no_pulse_msg 0 -0in_options {} -assertfile {} -sdfnowarn 0 -Lf {} -std_input {}
'
project_sim_p_search_libraries
=
'
-L {}
'
if
'
modelsim_search_libraries
'
in
lib_dict
:
project_sim_p_search_libraries
=
'
-L {
'
for
sl
in
lib_dict
[
'
modelsim_search_libraries
'
].
split
():
project_sim_p_search_libraries
+=
sl
project_sim_p_search_libraries
+=
'
'
project_sim_p_search_libraries
+=
'
}
'
project_sim_p_otherargs
=
'
OtherArgs {}
'
project_sim_p_otherargs
=
'
OtherArgs {}
'
project_sim_p_otherargs
=
'
OtherArgs {+nowarn8684 +nowarn8683 -quiet}
'
project_sim_p_otherargs
=
'
OtherArgs {+nowarn8684 +nowarn8683 -quiet}
'
project_sim_p_otherargs
=
'
OtherArgs {+nowarn8684 +nowarn8683}
'
project_sim_p_otherargs
=
'
OtherArgs {+nowarn8684 +nowarn8683}
'
...
@@ -223,13 +230,13 @@ class ModelsimConfig(hdl_config.HdlConfig):
...
@@ -223,13 +230,13 @@ class ModelsimConfig(hdl_config.HdlConfig):
for
i
,
fn
in
enumerate
(
test_bench_files
):
for
i
,
fn
in
enumerate
(
test_bench_files
):
fName
=
os
.
path
.
basename
(
fn
)
fName
=
os
.
path
.
basename
(
fn
)
tbName
=
os
.
path
.
splitext
(
fName
)[
0
]
tbName
=
os
.
path
.
splitext
(
fName
)[
0
]
fp
.
write
(
'
Project_Sim_P_%d = folder {Top Level} additional_dus work.%s %s %s %s
\n
'
%
(
i
,
tbName
,
project_sim_p_defaults
,
project_sim_p_otherargs
,
project_sim_p_optimization
))
fp
.
write
(
'
Project_Sim_P_%d = folder {Top Level} additional_dus work.%s %s %s
%s
%s
\n
'
%
(
i
,
tbName
,
project_sim_p_defaults
,
project_sim_p_search_libraries
,
project_sim_p_otherargs
,
project_sim_p_optimization
))
# Write [vsim] section
# Write [vsim] section
fp
.
write
(
'
[vsim]
\n
'
)
fp
.
write
(
'
[vsim]
\n
'
)
fp
.
write
(
'
RunLength = 0 ps
\n
'
)
fp
.
write
(
'
RunLength = 0 ps
\n
'
)
fp
.
write
(
'
resolution = 1fs
\n
'
)
fp
.
write
(
'
resolution = 1fs
\n
'
)
fp
.
write
(
'
IterationLimit =
1
00
\n
'
)
fp
.
write
(
'
IterationLimit =
50
00
\n
'
)
# According to 'verror 3601' the default is 5000, typically 100 is enough, but e.g. the ip_stratixiv_phy_xaui_0 requires more.
fp
.
write
(
'
DefaultRadix = decimal
\n
'
)
fp
.
write
(
'
DefaultRadix = decimal
\n
'
)
def
create_modelsim_project_files_file
(
self
,
filePath
=
None
,
lib_names
=
None
):
def
create_modelsim_project_files_file
(
self
,
filePath
=
None
,
lib_names
=
None
):
...
@@ -296,6 +303,10 @@ if __name__ == '__main__':
...
@@ -296,6 +303,10 @@ if __name__ == '__main__':
print
'
Create modelsim projects list file.
'
print
'
Create modelsim projects list file.
'
msim
.
create_modelsim_project_files_file
()
msim
.
create_modelsim_project_files_file
()
print
''
print
'
Copy Modelsim directories and files from HDL library source tree to build_dir_sim for all HDL libraries that are found in $%s.
'
%
libRootDir
msim
.
copy_files
(
'
sim
'
)
print
''
print
''
print
'
Create modelsim project files for technology %s and all HDL libraries in $%s.
'
%
(
technologyNames
,
libRootDir
)
print
'
Create modelsim project files for technology %s and all HDL libraries in $%s.
'
%
(
technologyNames
,
libRootDir
)
msim
.
create_modelsim_project_file
(
technologyNames
)
msim
.
create_modelsim_project_file
(
technologyNames
)
...
...
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