Fix prefixes.

applications/lofar2/designs/lofar2_unb2b_adc/tb/vhdl/tb_lofar2_unb2b_adc_multichannel.vhd

@@ -300,7 +300,7 @@ begin
 
     -- Generate test pattern at each ADC
 
-    proc_data : process (jesd204b_sampclk_adc(i), mm_rst)
+    p_data : process (jesd204b_sampclk_adc(i), mm_rst)
       variable data  : integer := 0;
       variable even_sample : boolean := true;
     begin
@@ -339,7 +339,6 @@ begin
          end if;
        end if;
     end process;
-
   end generate;
 
   -----------------------------------------------------------------------------
@@ -361,7 +360,7 @@ begin
   bonding_clock_2 <= not bonding_clock_2 after 500 ps;
   bonding_clock_0 <= not bonding_clock_0 after 2500 ps;
 
-  bonding_clock_1_process : process
+  p_bonding_clock_1 : process
   begin
     bonding_clock_1 <= '0';
     wait for 4000 ps;
@@ -381,7 +380,7 @@ begin
 
   -- clock source process
 
-  proc_sysref : process (jesd204b_sampclk, mm_rst)
+  p_sysref : process (jesd204b_sampclk, mm_rst)
     variable count  : natural := 0;
   begin
     if mm_rst = '1' then
@@ -407,7 +406,7 @@ begin
   ------------------------------------------------------------------------------
   -- Diagnostics
   ------------------------------------------------------------------------------
-  proc_read_avs_regs : process
+  p_read_avs_regs : process
   begin
     wait for 100 ns;
     avs_address(0) <= (others => '0');

applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_adc/tb_lofar2_unb2c_sdp_station_adc_jesd.vhd

@@ -355,7 +355,7 @@ begin
   bonding_clock_2 <= not bonding_clock_2 after 500 ps;
   bonding_clock_0 <= not bonding_clock_0 after 2500 ps;
 
-  bonding_clock_1_process : process
+  p_bonding_clock_1 : process
   begin
     bonding_clock_1 <= '0';
     wait for 4000 ps;

applications/lofar2/libraries/ddrctrl/src/vhdl/ddrctrl_input_repack.vhd

@@ -56,7 +56,7 @@ end ddrctrl_input_repack;
 architecture rtl of ddrctrl_input_repack is
   -- constant for readability
   constant c_out_data_w     : natural       := func_tech_ddr_ctlr_data_w( g_tech_ddr );  -- the output data with, 576
-  constant k_c_v_w          : natural       := c_out_data_w * 2;  -- the c_v data with, 2*576=1152
+  constant c_c_v_w          : natural       := c_out_data_w * 2;  -- the c_v data with, 2*576=1152
 
   -- type for statemachine
   type t_state is (OVERFLOW_OUTPUT, FILL_VECTOR, FIRST_OUTPUT, RESET, STOP, BSN);
@@ -64,7 +64,7 @@ architecture rtl of ddrctrl_input_repack is
   -- record for readability
   type t_reg is record
   state                     : t_state;  -- the state the process is currently in;
-  c_v                       : std_logic_vector(k_c_v_w - 1 downto 0);  -- the vector that stores the input data until the data is put into the output data vector
+  c_v                       : std_logic_vector(c_c_v_w - 1 downto 0);  -- the vector that stores the input data until the data is put into the output data vector
   c_v_count                 : natural;  -- the amount of times the c_v vector received data from the input since the last time it was filled completely
   q_bsn                     : std_logic_vector(c_dp_stream_bsn_w - 1 downto 0);
   q_sop                     : std_logic;
@@ -114,9 +114,9 @@ begin
 
     when OVERFLOW_OUTPUT =>  -- if the input data exceeds the output data vector width and the c_v width
       v.out_of := q_reg.out_of + (g_in_data_w * (q_reg.c_v_count + 1)) - (c_out_data_w * 2);  -- check how much overflow there is and safe it in out_of
-      v.c_v(k_c_v_w - 1 downto k_c_v_w - (g_in_data_w - v.out_of)) := in_sosi.data(g_in_data_w - v.out_of - 1 downto 0);  -- fill the rest of c_v untill the end
+      v.c_v(c_c_v_w - 1 downto c_c_v_w - (g_in_data_w - v.out_of)) := in_sosi.data(g_in_data_w - v.out_of - 1 downto 0);  -- fill the rest of c_v untill the end
       v.c_v(v.out_of - 1 downto 0) := in_sosi.data(g_in_data_w - 1 downto g_in_data_w - v.out_of);  -- fill the start of c_v untill the out_of
-      v.out_sosi.data(c_out_data_w - 1 downto 0) := v.c_v(k_c_v_w - 1 downto c_out_data_w);  -- fill out_sosi.data with 2nd part of c_v
+      v.out_sosi.data(c_out_data_w - 1 downto 0) := v.c_v(c_c_v_w - 1 downto c_out_data_w);  -- fill out_sosi.data with 2nd part of c_v
       v.out_sosi.valid := '1';  -- out_sosi.valid 1
       v.c_v_count      := 0;  -- reset counter
       v.out_data_count := '0';  -- reset counter
@@ -128,13 +128,13 @@ begin
 
     when BSN =>
 
-      v.c_v(k_c_v_w - 1 downto ((g_in_data_w * q_reg.c_v_count) + q_reg.out_of)) := (others => '0');
+      v.c_v(c_c_v_w - 1 downto ((g_in_data_w * q_reg.c_v_count) + q_reg.out_of)) := (others => '0');
       v.out_of            := 0;
       if ((g_in_data_w * q_reg.c_v_count) + q_reg.out_of < c_out_data_w * 1) then
         v.out_sosi.data(c_out_data_w - 1 downto 0) := v.c_v(c_out_data_w - 1 downto 0);  -- fill out_sosi.data with 1st part of c_v
         v.out_sosi.valid  := '1';  -- out_sosi.valid 1
       else
-        v.out_sosi.data(c_out_data_w - 1 downto 0) := v.c_v(k_c_v_w - 1 downto c_out_data_w);  -- fill out_sosi.data with 2nd part of c_v
+        v.out_sosi.data(c_out_data_w - 1 downto 0) := v.c_v(c_c_v_w - 1 downto c_out_data_w);  -- fill out_sosi.data with 2nd part of c_v
         v.out_sosi.valid  := '1';  -- out_sosi.valid 1
       end if;
 

applications/lofar2/libraries/sdp/src/vhdl/node_sdp_oversampled_filterbank.vhd

@@ -36,17 +36,18 @@
 -- .
 -------------------------------------------------------------------------------
 
-library IEEE, common_lib, dp_lib, diag_lib, rTwoSDF_lib, common_mult_lib, fft_lib, wpfb_lib, filter_lib, si_lib, st_lib, mm_lib;
+library IEEE, common_lib, dp_lib, mm_lib, diag_lib, common_mult_lib;
+library rTwoSDF_lib, fft_lib, wpfb_lib, filter_lib, si_lib, st_lib;
   use IEEE.std_logic_1164.all;
   use common_lib.common_pkg.all;
   use common_lib.common_mem_pkg.all;
   use common_lib.common_network_layers_pkg.all;
   use dp_lib.dp_stream_pkg.all;
+  use diag_lib.diag_pkg.all;
   use rTwoSDF_lib.rTwoSDFPkg.all;
   use filter_lib.fil_pkg.all;
   use fft_lib.fft_pkg.all;
   use wpfb_lib.wpfb_pkg.all;
-use diag_lib.diag_pkg.all;
   use work.sdp_pkg.all;
 
 entity node_sdp_oversampled_filterbank is
@@ -422,7 +423,8 @@ begin
     in_dat     => dp_bsn_source_restart_pipe,
     out_dat    => dp_bsn_source_restart_pipe_complex
   );
-  process(mixer_complex_requantize_src_out_arr, si_sosi_0_piped)
+
+  p_align : process(mixer_complex_requantize_src_out_arr, si_sosi_0_piped)
   begin
     for I in 0 to c_sdp_S_pn - 1 loop
       wpfb_unit_complex_in_sosi_arr(I) <= si_sosi_0_piped;
@@ -528,7 +530,6 @@ begin
       subband_equalizer_in_sosi_arr(c_sdp_P_pfb + I).re <= SHIFT_SVEC(wpfb_complex_out_interleaved_sosi_arr(I).re, c_dat_w_diff);
       subband_equalizer_in_sosi_arr(c_sdp_P_pfb + I).im <= SHIFT_SVEC(wpfb_complex_out_interleaved_sosi_arr(I).im, c_dat_w_diff);
     end process;
-
   end generate;
 
   -- Pipeline to compensate for longer latency of the complex PFB.

applications/lofar2/libraries/sdp/src/vhdl/sdp_tbuf_pkg.vhd

@@ -34,7 +34,6 @@ use common_lib.common_field_pkg.all;
 use work.sdp_pkg.all;
 
 package sdp_tbuf_pkg is
-
   -----------------------------------------------------------------------------
   -- TBUF registers
   -----------------------------------------------------------------------------
@@ -84,5 +83,4 @@ package sdp_tbuf_pkg is
   constant c_sdp_tbuf_registers_rst :t_sdp_tbuf_registers :=
     (0, 0, '0', '0', 0, 0, 0, 0, (others => '0'), (others => '0'),
      0, 0, 0, (others => '0'), (others => '0'), '0');
-
 end sdp_tbuf_pkg;

applications/lofar2/libraries/sdp/tb/vhdl/tb_sdp_statistics_offload.vhd

@@ -515,8 +515,16 @@ begin
             v_exp_data := v_exp_data + 2;  -- due to c_sdp_W_statistic_sz = 2 and c_mm_nof_step = 2 > 1
           end if;
           v_exp_data := v_exp_data + (P / 2) * 2048;  -- due to c_packet_size = 1024 and c_mm_nof_step = 2 > 1
-          if g_statistics_type = "SST"    then assert v_exp_data = v_rx_data report "Wrong SST payload data Rx" severity ERROR; end if;
-          if g_statistics_type = "SST_OS" then assert v_exp_data = v_rx_data report "Wrong SST_OS payload data Rx" severity ERROR; end if;
+          if g_statistics_type = "SST" then
+            assert v_exp_data = v_rx_data
+              report "Wrong SST payload data Rx"
+              severity ERROR;
+          end if;
+          if g_statistics_type = "SST_OS" then
+            assert v_exp_data = v_rx_data
+              report "Wrong SST_OS payload data Rx"
+              severity ERROR;
+          end if;
 
         elsif g_statistics_type = "BST" then
           --    Indices: