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Commit a31f175c authored by Eric Kooistra's avatar Eric Kooistra
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Support out_start_interval to mark first out_sosi.sync interval.

parent 83506a4c
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1 merge request!270Resolve L2SDP-791
...@@ -63,6 +63,9 @@ ...@@ -63,6 +63,9 @@
-- * out_start: -- * out_start:
-- Pulse at out_sosi.sync with out_sosi.bsn = ctrl_start_bsn. The first -- Pulse at out_sosi.sync with out_sosi.bsn = ctrl_start_bsn. The first
-- out_sosi.sync interval will have nof_blk_max blocks. -- out_sosi.sync interval will have nof_blk_max blocks.
-- * out_start_interval:
-- Active from out_start until next out_sosi.sync, so active during the
-- first out_sosi.sync interval of a new out_sosi sequence.
-- * out_enable: -- * out_enable:
-- Goes high at first out_sosi.sync. In case of a restart when ctrl_enable -- Goes high at first out_sosi.sync. In case of a restart when ctrl_enable
-- was already '1', then the out_enable will go low and high to ensure that -- was already '1', then the out_enable will go low and high to ensure that
...@@ -135,6 +138,7 @@ ENTITY dp_bsn_sync_scheduler IS ...@@ -135,6 +138,7 @@ ENTITY dp_bsn_sync_scheduler IS
in_sosi : IN t_dp_sosi; in_sosi : IN t_dp_sosi;
out_sosi : OUT t_dp_sosi; out_sosi : OUT t_dp_sosi;
out_start : OUT STD_LOGIC; -- pulse at out_sosi.sync at ctrl_start_bsn out_start : OUT STD_LOGIC; -- pulse at out_sosi.sync at ctrl_start_bsn
out_start_interval : OUT STD_LOGIC; -- active during first out_sosi.sync interval
out_enable : OUT STD_LOGIC -- for tb verification purposes out_enable : OUT STD_LOGIC -- for tb verification purposes
); );
END dp_bsn_sync_scheduler; END dp_bsn_sync_scheduler;
...@@ -166,9 +170,13 @@ ARCHITECTURE rtl OF dp_bsn_sync_scheduler IS ...@@ -166,9 +170,13 @@ ARCHITECTURE rtl OF dp_bsn_sync_scheduler IS
SIGNAL r : t_reg; SIGNAL r : t_reg;
SIGNAL nxt_r : t_reg; SIGNAL nxt_r : t_reg;
SIGNAL output_start : STD_LOGIC; SIGNAL output_enable : STD_LOGIC;
SIGNAL output_sync : STD_LOGIC; SIGNAL output_next : STD_LOGIC; -- active at next output_sync's
SIGNAL output_sosi : t_dp_sosi; SIGNAL output_start : STD_LOGIC; -- active at first output_sync
SIGNAL output_start_interval : STD_LOGIC; -- active during first output_sync interval
SIGNAL output_start_interval_reg : STD_LOGIC := '0';
SIGNAL output_sync : STD_LOGIC;
SIGNAL output_sosi : t_dp_sosi;
BEGIN BEGIN
...@@ -371,14 +379,16 @@ BEGIN ...@@ -371,14 +379,16 @@ BEGIN
nxt_r <= v; nxt_r <= v;
END PROCESS; END PROCESS;
output_enable <= nxt_r.output_enable;
----------------------------------------------------------------------------- -----------------------------------------------------------------------------
-- Output in_sosi with programmed sync interval or disable the output -- Output in_sosi with programmed sync interval or disable the output
----------------------------------------------------------------------------- -----------------------------------------------------------------------------
-- . note this is part of p_comb, but using a separate process is fine too. -- . note this is part of p_comb, but using a separate process is fine too.
p_output_sosi : PROCESS(in_sosi, nxt_r, output_sync) p_output_sosi : PROCESS(in_sosi, output_enable, output_sync)
BEGIN BEGIN
output_sosi <= in_sosi; output_sosi <= in_sosi;
IF nxt_r.output_enable = '1' THEN IF output_enable = '1' THEN
output_sosi.sync <= output_sync; output_sosi.sync <= output_sync;
ELSE ELSE
output_sosi.sync <= '0'; output_sosi.sync <= '0';
...@@ -389,7 +399,30 @@ BEGIN ...@@ -389,7 +399,30 @@ BEGIN
END PROCESS; END PROCESS;
----------------------------------------------------------------------------- -----------------------------------------------------------------------------
-- Pipeline output to avoid timing closure problems due to use of nxt_r.output_enable -- Determine output_start_interval
-----------------------------------------------------------------------------
output_next <= output_sync AND NOT output_start;
p_output_start_interval : PROCESS(output_start_interval_reg, output_start, output_next, output_enable)
BEGIN
-- Hold output_start until next sync interval
output_start_interval <= output_start_interval_reg;
IF output_start = '1' THEN
output_start_interval <= '1';
ELSIF output_next = '1' THEN
output_start_interval <= '0';
END IF;
-- provided that output_enable is still active
IF output_enable = '0' THEN
output_start_interval <= '0';
END IF;
END PROCESS;
output_start_interval_reg <= output_start_interval WHEN rising_edge(clk);
-----------------------------------------------------------------------------
-- Pipeline output to avoid timing closure problems due to use of output_enable
----------------------------------------------------------------------------- -----------------------------------------------------------------------------
u_out_sosi : ENTITY work.dp_pipeline u_out_sosi : ENTITY work.dp_pipeline
GENERIC MAP ( GENERIC MAP (
...@@ -406,11 +439,13 @@ BEGIN ...@@ -406,11 +439,13 @@ BEGIN
gen_pipe_out_start : IF g_pipeline = 1 GENERATE gen_pipe_out_start : IF g_pipeline = 1 GENERATE
out_start <= output_start WHEN rising_edge(clk); out_start <= output_start WHEN rising_edge(clk);
out_start_interval <= output_start_interval_reg;
out_enable <= r.output_enable; out_enable <= r.output_enable;
END GENERATE; END GENERATE;
no_pipe_out_start : IF g_pipeline = 0 GENERATE no_pipe_out_start : IF g_pipeline = 0 GENERATE
out_start <= output_start; out_start <= output_start;
out_enable <= nxt_r.output_enable; out_start_interval <= output_start_interval;
out_enable <= output_enable;
END GENERATE; END GENERATE;
END rtl; END rtl;
......
...@@ -79,10 +79,11 @@ ENTITY mmp_dp_bsn_sync_scheduler IS ...@@ -79,10 +79,11 @@ ENTITY mmp_dp_bsn_sync_scheduler IS
reg_miso : OUT t_mem_miso; reg_miso : OUT t_mem_miso;
-- Streaming -- Streaming
in_sosi : IN t_dp_sosi; in_sosi : IN t_dp_sosi;
out_sosi : OUT t_dp_sosi; out_sosi : OUT t_dp_sosi;
out_start : OUT STD_LOGIC; out_start : OUT STD_LOGIC;
out_enable : OUT STD_LOGIC out_start_interval : OUT STD_LOGIC;
out_enable : OUT STD_LOGIC
); );
END mmp_dp_bsn_sync_scheduler; END mmp_dp_bsn_sync_scheduler;
...@@ -215,6 +216,7 @@ BEGIN ...@@ -215,6 +216,7 @@ BEGIN
in_sosi => in_sosi, in_sosi => in_sosi,
out_sosi => out_sosi, out_sosi => out_sosi,
out_start => out_start, out_start => out_start,
out_start_interval => out_start_interval,
out_enable => out_enable out_enable => out_enable
); );
......
...@@ -50,10 +50,11 @@ ENTITY mmp_dp_bsn_sync_scheduler_arr IS ...@@ -50,10 +50,11 @@ ENTITY mmp_dp_bsn_sync_scheduler_arr IS
reg_miso : OUT t_mem_miso; reg_miso : OUT t_mem_miso;
-- Streaming -- Streaming
in_sosi_arr : IN t_dp_sosi_arr(g_nof_streams-1 DOWNTO 0); in_sosi_arr : IN t_dp_sosi_arr(g_nof_streams-1 DOWNTO 0);
out_sosi_arr : OUT t_dp_sosi_arr(g_nof_streams-1 DOWNTO 0); out_sosi_arr : OUT t_dp_sosi_arr(g_nof_streams-1 DOWNTO 0);
out_start : OUT STD_LOGIC; out_start : OUT STD_LOGIC;
out_enable : OUT STD_LOGIC out_start_interval : OUT STD_LOGIC;
out_enable : OUT STD_LOGIC
); );
END mmp_dp_bsn_sync_scheduler_arr; END mmp_dp_bsn_sync_scheduler_arr;
...@@ -84,8 +85,9 @@ BEGIN ...@@ -84,8 +85,9 @@ BEGIN
in_sosi => in_sosi_arr(0), in_sosi => in_sosi_arr(0),
out_sosi => single_src_out, out_sosi => single_src_out,
out_start => out_start, out_start => out_start,
out_enable => out_enable out_start_interval => out_start_interval,
out_enable => out_enable
); );
-- Pipeline in_sosi_arr to compensate for the latency in mmp_dp_bsn_sync_scheduler -- Pipeline in_sosi_arr to compensate for the latency in mmp_dp_bsn_sync_scheduler
......
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