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Commit a213898e authored by Daniel van der Schuur's avatar Daniel van der Schuur
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-Wrapped FIFOs and dp_src_out_timer in new entity corr_visibility_buffer.vhd.

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libraries/dsp/correlator/hdllib.cfg
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...@@ -13,6 +13,7 @@ synth_files = ...@@ -13,6 +13,7 @@ synth_files =
$SVN/RadioHDL/trunk/libraries/dsp/correlator/src/vhdl/corr_multiplier.vhd $SVN/RadioHDL/trunk/libraries/dsp/correlator/src/vhdl/corr_multiplier.vhd
$SVN/RadioHDL/trunk/libraries/dsp/correlator/src/vhdl/corr_adder.vhd $SVN/RadioHDL/trunk/libraries/dsp/correlator/src/vhdl/corr_adder.vhd
$SVN/RadioHDL/trunk/libraries/dsp/correlator/src/vhdl/corr_accumulator.vhd $SVN/RadioHDL/trunk/libraries/dsp/correlator/src/vhdl/corr_accumulator.vhd
$SVN/RadioHDL/trunk/libraries/dsp/correlator/src/vhdl/corr_visibility_buffer.vhd
$SVN/RadioHDL/trunk/libraries/dsp/correlator/src/vhdl/correlator.vhd $SVN/RadioHDL/trunk/libraries/dsp/correlator/src/vhdl/correlator.vhd
test_bench_files = test_bench_files =
......
libraries/dsp/correlator/src/vhdl/corr_visibility_buffer.vhd 0 → 100644
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View file @ a213898e
--------------------------------------------------------------------------------
--
-- Copyright (C) 2014
-- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
-- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
--
-- This program is free software: you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation, either version 3 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program. If not, see <http://www.gnu.org/licenses/>.
--
--------------------------------------------------------------------------------
LIBRARY IEEE, common_lib, dp_lib;
USE IEEE.std_logic_1164.ALL;
USE IEEE.numeric_std.ALL;
USE common_lib.common_pkg.ALL;
USE dp_lib.dp_stream_pkg.ALL;
-- Purpose:
-- . Buffer the visibilities during folding
-- Description:
-- . Consists of an array of FIFOs that are read out periodically
ENTITY corr_visibility_buffer IS
GENERIC (
g_nof_inputs : NATURAL; -- Number of input streams
g_nof_channels : NATURAL; -- Number of channels per visibility
g_data_w : NATURAL -- Complex input data width
);
PORT (
rst : IN STD_LOGIC;
clk : IN STD_LOGIC;
snk_in_arr : IN t_dp_sosi_arr(g_nof_inputs-1 DOWNTO 0);
src_out_arr : OUT t_dp_sosi_arr(g_nof_inputs-1 DOWNTO 0)
);
END corr_visibility_buffer;
ARCHITECTURE str OF corr_visibility_buffer IS
SIGNAL dp_fifo_sc_src_out_arr : t_dp_sosi_arr(g_nof_inputs-1 DOWNTO 0);
SIGNAL dp_fifo_sc_src_in_arr : t_dp_siso_arr(g_nof_inputs-1 DOWNTO 0);
BEGIN
------------------------------------------------------------------------------
-- Buffer the visibilities before the folding stage.
-- . All accumulators output blocks of visibilities at the same time. We need
-- to buffer the visibilities to source them to the folder at the right
-- pace.
------------------------------------------------------------------------------
gen_dp_fifo_sc : FOR i IN 0 TO g_nof_inputs-1 GENERATE
u_dp_fifo_sc : ENTITY dp_lib.dp_fifo_sc
GENERIC MAP (
g_data_w => 2*g_data_w,
g_use_ctrl => FALSE,
g_use_complex => TRUE,
g_fifo_size => g_nof_channels,
g_fifo_af_margin => 0
)
PORT MAP (
rst => rst,
clk => clk,
wr_ful => OPEN,
usedw => OPEN,
rd_emp => OPEN,
snk_out => OPEN,
snk_in => snk_in_arr(i),
src_in => dp_fifo_sc_src_in_arr(i),
src_out => dp_fifo_sc_src_out_arr(i)
);
END GENERATE;
------------------------------------------------------------------------------
-- Read out the FIFOs such that dp_fifo_sc_src_out_arr only carries one valid
-- word per cycle. This allows folding (multiplexing) into one stream without
-- losing data (example for 16 streams):
--
-- |<--g_nof_invalid_per_valid-->|
-- 0) [0] [1] ..
-- 1) | [0] . [1]
-- 2) | [0] . [1]
-- 3) | [0] . [1]
-- 4) | [0] . [1]
-- 5) | [0] . [1]
-- 6) | [0] . [1]
-- 7) | [0] . [1]
-- 8) | [0] . [1]
-- 9) | [0] . [1]
-- 10) | [0] . [1]
-- 11) | [0] . [1]
-- 12) | [0] . [1]
-- 13) | [0] . [1]
-- 14) | [0] . [1]
-- 15) |<---g_init_valid_delay(15)-->[0] [1]
------------------------------------------------------------------------------
gen_dp_src_out_timer : FOR i IN 0 TO g_nof_inputs-1 GENERATE
u_dp_src_out_timer : ENTITY dp_lib.dp_src_out_timer
GENERIC MAP (
g_init_valid_delay => i, --relative to dp_fifo_sc_src_out_arr(i).valid
g_nof_invalid_per_valid => g_nof_inputs
)
PORT MAP (
rst => rst,
clk => clk,
init_valid_delay_ref => snk_in_arr(i).valid,
snk_in => dp_fifo_sc_src_out_arr(i),
snk_out => dp_fifo_sc_src_in_arr(i)
);
END GENERATE;
src_out_arr <= dp_fifo_sc_src_out_arr;
END str;
libraries/dsp/correlator/src/vhdl/correlator.vhd
+ 28
− 80
View file @ a213898e
...@@ -76,9 +76,8 @@ ARCHITECTURE str OF correlator IS ...@@ -76,9 +76,8 @@ ARCHITECTURE str OF correlator IS
SIGNAL corr_multiplier_src_out_arr : t_dp_sosi_arr(c_nof_mults-1 DOWNTO 0); SIGNAL corr_multiplier_src_out_arr : t_dp_sosi_arr(c_nof_mults-1 DOWNTO 0);
SIGNAL corr_accumulator_snk_in_arr : t_dp_sosi_arr(c_nof_mults-1 DOWNTO 0); SIGNAL corr_accumulator_snk_in_arr : t_dp_sosi_arr(c_nof_mults-1 DOWNTO 0);
SIGNAL corr_accumulator_src_out_arr : t_dp_sosi_arr(c_nof_mults-1 DOWNTO 0); SIGNAL corr_accumulator_src_out_arr : t_dp_sosi_arr(c_nof_mults-1 DOWNTO 0);
SIGNAL dp_fifo_sc_snk_in_arr : t_dp_sosi_arr(c_nof_mults-1 DOWNTO 0); SIGNAL corr_visibility_buffer_snk_in_arr : t_dp_sosi_arr(c_nof_mults-1 DOWNTO 0);
SIGNAL dp_fifo_sc_src_out_arr : t_dp_sosi_arr(c_nof_mults-1 DOWNTO 0); SIGNAL corr_visibility_buffer_src_out_arr : t_dp_sosi_arr(c_nof_mults-1 DOWNTO 0);
SIGNAL dp_fifo_sc_src_in_arr : t_dp_siso_arr(c_nof_mults-1 DOWNTO 0);
SIGNAL corr_folder_src_out_arr : t_dp_sosi_arr(1-1 DOWNTO 0); SIGNAL corr_folder_src_out_arr : t_dp_sosi_arr(1-1 DOWNTO 0);
BEGIN BEGIN
...@@ -188,79 +187,28 @@ BEGIN ...@@ -188,79 +187,28 @@ BEGIN
clk => clk, clk => clk,
snk_in => corr_accumulator_src_out_arr(i), snk_in => corr_accumulator_src_out_arr(i),
src_out => dp_fifo_sc_snk_in_arr(i) src_out => corr_visibility_buffer_snk_in_arr(i)
); );
END GENERATE; END GENERATE;
------------------------------------------------------------------------------ ------------------------------------------------------------------------------
-- Buffer the visibilities before the folding stage. -- Buffer the visibilities before the folding stage.
-- . All accumulators output blocks of visibilities at the same time. We need -- . All accumulators output blocks of visibilities at the same time. We need
-- to buffer the visibilities so we can take our time to multiplex them -- to buffer the visibilities to source them to the folder at the right
-- onto one stream. -- pace.
------------------------------------------------------------------------------ ------------------------------------------------------------------------------
gen_dp_fifo_sc : FOR i IN 0 TO c_nof_mults-1 GENERATE u_corr_visibility_buffer : ENTITY work.corr_visibility_buffer
u_dp_fifo_sc : ENTITY dp_lib.dp_fifo_sc
GENERIC MAP ( GENERIC MAP (
g_data_w => 2*c_acc_data_w, g_nof_inputs => c_nof_mults,
g_use_ctrl => FALSE, g_data_w => c_acc_data_w
g_use_complex => TRUE,
g_fifo_size => 64,
g_fifo_af_margin => 0
) )
PORT MAP ( PORT MAP (
rst => rst,
clk => clk, clk => clk,
wr_ful => OPEN,
usedw => OPEN,
rd_emp => OPEN,
snk_out => OPEN,
snk_in => dp_fifo_sc_snk_in_arr(i),
src_in => dp_fifo_sc_src_in_arr(i),
src_out => dp_fifo_sc_src_out_arr(i)
);
END GENERATE;
------------------------------------------------------------------------------
-- Read out the FIFOs such that dp_fifo_sc_src_out_arr only carries one valid
-- word per cycle. This allows folding (multiplexing) into one stream without
-- losing data (example for 16 streams):
--
-- |<--g_nof_invalid_per_valid-->|
-- 0) [0] [1] ..
-- 1) | [0] . [1]
-- 2) | [0] . [1]
-- 3) | [0] . [1]
-- 4) | [0] . [1]
-- 5) | [0] . [1]
-- 6) | [0] . [1]
-- 7) | [0] . [1]
-- 8) | [0] . [1]
-- 9) | [0] . [1]
-- 10) | [0] . [1]
-- 11) | [0] . [1]
-- 12) | [0] . [1]
-- 13) | [0] . [1]
-- 14) | [0] . [1]
-- 15) |<---g_init_valid_delay(15)-->[0] [1]
------------------------------------------------------------------------------
gen_dp_src_out_timer : FOR i IN 0 TO c_nof_mults-1 GENERATE
u_dp_src_out_timer : ENTITY dp_lib.dp_src_out_timer
GENERIC MAP (
g_init_valid_delay => i, --relative to dp_fifo_sc_src_out_arr(i).valid
g_nof_invalid_per_valid => c_nof_mults
)
PORT MAP (
rst => rst, rst => rst,
clk => clk,
init_valid_delay_ref => dp_fifo_sc_snk_in_arr(i).valid, snk_in_arr => corr_visibility_buffer_snk_in_arr,
src_out_arr => corr_visibility_buffer_src_out_arr
snk_in => dp_fifo_sc_src_out_arr(i),
snk_out => dp_fifo_sc_src_in_arr(i)
); );
END GENERATE;
------------------------------------------------------------------------------ ------------------------------------------------------------------------------
-- Fold onto one stream -- Fold onto one stream
...@@ -274,7 +222,7 @@ BEGIN ...@@ -274,7 +222,7 @@ BEGIN
rst => rst, rst => rst,
clk => clk, clk => clk,
snk_in_arr => dp_fifo_sc_src_out_arr, snk_in_arr => corr_visibility_buffer_src_out_arr,
src_out_arr => corr_folder_src_out_arr src_out_arr => corr_folder_src_out_arr
); );
......
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