Compile flash model in synth_files section, because it is used in...

Compile flash model in synth_files section, because it is used in ip_stratixiv_asmi_parallel.vhd for simulation only.

libraries/technology/altera/stratixiv/hdllib.cfg

@@ -6,6 +6,14 @@ build_sim_dir = $HDL_BUILD_DIR
 build_synth_dir = 
 
 synth_files =
+    $UNB/Firmware/modules/epcs/tb/vhdl/m25p128_model/StringLib.vhd
+    $UNB/Firmware/modules/epcs/tb/vhdl/m25p128_model/def.vhd
+    $UNB/Firmware/modules/epcs/tb/vhdl/m25p128_model/CUIcommandData.vhd
+    $UNB/Firmware/modules/epcs/tb/vhdl/m25p128_model/data.vhd
+    $UNB/Firmware/modules/epcs/tb/vhdl/m25p128_model/BlockLib.vhd
+    $UNB/Firmware/modules/epcs/tb/vhdl/m25p128_model/TimingData.vhd
+    $UNB/Firmware/modules/epcs/tb/vhdl/m25p128_model/MemoryLib.vhd
+    $UNB/Firmware/modules/epcs/tb/vhdl/m25p128_model/M25P128.vhd
     ip_stratixiv_asmi_parallel.vhd
     ip_stratixiv_remote_update.vhd