Renamed *_generic into *32b_generic.vhd.. Only need to provide the...

Renamed *_generic into *32b_generic.vhd.. Only need to provide the ip_stratixiv_gxb_reconfig.vhd with generics.

libraries/technology/transceiver/tech_transceiver_component_pkg.vhd

@@ -30,7 +30,7 @@ PACKAGE tech_transceiver_component_pkg IS
   -- ip_stratixiv
   ------------------------------------------------------------------------------
   
-  COMPONENT ip_stratixiv_hssi_gx_generic IS
+  COMPONENT ip_stratixiv_hssi_gx_32b_generic IS
   GENERIC (
     g_mbps                    : NATURAL;
     starting_channel_number   : NATURAL := 0
@@ -65,7 +65,7 @@ PACKAGE tech_transceiver_component_pkg IS
   );
   END COMPONENT;
 
-  COMPONENT ip_stratixiv_hssi_tx_generic IS
+  COMPONENT ip_stratixiv_hssi_tx_32b_generic IS
   GENERIC(
     g_mbps : NATURAL
   );
@@ -83,7 +83,7 @@ PACKAGE tech_transceiver_component_pkg IS
   );
   END COMPONENT;
   
-  COMPONENT ip_stratixiv_hssi_rx_generic IS
+  COMPONENT ip_stratixiv_hssi_rx_32b_generic IS
   GENERIC (
     g_mbps                  : NATURAL;
     starting_channel_number : NATURAL := 0
@@ -110,41 +110,84 @@ PACKAGE tech_transceiver_component_pkg IS
   );
   END COMPONENT;
   
-  
-  COMPONENT ip_stratixiv_gxb_reconfig_12 IS
-  PORT (
-    reconfig_clk     : IN STD_LOGIC ;
-    reconfig_fromgxb : IN STD_LOGIC_VECTOR (203 DOWNTO 0);
-    busy             : OUT STD_LOGIC ;
-    reconfig_togxb   : OUT STD_LOGIC_VECTOR (3 DOWNTO 0)
+  COMPONENT ip_stratixiv_hssi_gx_16b IS
+  GENERIC
+  (
+    starting_channel_number   : NATURAL := 0
+  );
+  PORT
+  (
+    cal_blk_clk   : IN STD_LOGIC ;
+    pll_inclk   : IN STD_LOGIC ;
+    pll_powerdown   : IN STD_LOGIC_VECTOR (0 DOWNTO 0);
+    reconfig_clk    : IN STD_LOGIC ;
+    reconfig_togxb    : IN STD_LOGIC_VECTOR (3 DOWNTO 0);
+    rx_analogreset    : IN STD_LOGIC_VECTOR (0 DOWNTO 0);
+    rx_datain   : IN STD_LOGIC_VECTOR (0 DOWNTO 0);
+    rx_digitalreset   : IN STD_LOGIC_VECTOR (0 DOWNTO 0);
+    tx_ctrlenable   : IN STD_LOGIC_VECTOR (1 DOWNTO 0);
+    tx_datain   : IN STD_LOGIC_VECTOR (15 DOWNTO 0);
+    tx_digitalreset   : IN STD_LOGIC_VECTOR (0 DOWNTO 0);
+    pll_locked    : OUT STD_LOGIC_VECTOR (0 DOWNTO 0);
+    reconfig_fromgxb    : OUT STD_LOGIC_VECTOR (16 DOWNTO 0);
+    rx_clkout   : OUT STD_LOGIC_VECTOR (0 DOWNTO 0);
+    rx_ctrldetect   : OUT STD_LOGIC_VECTOR (1 DOWNTO 0);
+    rx_dataout    : OUT STD_LOGIC_VECTOR (15 DOWNTO 0);
+    rx_freqlocked   : OUT STD_LOGIC_VECTOR (0 DOWNTO 0);
+    tx_clkout   : OUT STD_LOGIC_VECTOR (0 DOWNTO 0);
+    tx_dataout    : OUT STD_LOGIC_VECTOR (0 DOWNTO 0)
   );
   END COMPONENT;
   
-  COMPONENT ip_stratixiv_gxb_reconfig_8 IS
-  PORT (
-    reconfig_clk     : IN STD_LOGIC ;
-    reconfig_fromgxb : IN STD_LOGIC_VECTOR (135 DOWNTO 0);
-    busy             : OUT STD_LOGIC ;
-    reconfig_togxb   : OUT STD_LOGIC_VECTOR (3 DOWNTO 0)
+  COMPONENT ip_stratixiv_hssi_tx_16b IS
+  PORT
+  (
+    cal_blk_clk   : IN STD_LOGIC ;
+    pll_inclk   : IN STD_LOGIC ;
+    pll_powerdown   : IN STD_LOGIC_VECTOR (0 DOWNTO 0);
+    tx_ctrlenable   : IN STD_LOGIC_VECTOR (1 DOWNTO 0);
+    tx_datain   : IN STD_LOGIC_VECTOR (15 DOWNTO 0);
+    tx_digitalreset   : IN STD_LOGIC_VECTOR (0 DOWNTO 0);
+    pll_locked    : OUT STD_LOGIC_VECTOR (0 DOWNTO 0);
+    tx_clkout   : OUT STD_LOGIC_VECTOR (0 DOWNTO 0);
+    tx_dataout    : OUT STD_LOGIC_VECTOR (0 DOWNTO 0)
   );
-  END COMPONENT;
+  END COMPONENT;  
+  
+  COMPONENT ip_stratixiv_hssi_rx_16b IS
+  GENERIC
+  (
+    starting_channel_number   : NATURAL := 0
+  );
+  PORT
+  (
+    cal_blk_clk   : IN STD_LOGIC ;
+    reconfig_clk    : IN STD_LOGIC ;
+    reconfig_togxb    : IN STD_LOGIC_VECTOR (3 DOWNTO 0);
+    rx_analogreset    : IN STD_LOGIC_VECTOR (0 DOWNTO 0);
+    rx_cruclk   : IN STD_LOGIC_VECTOR (0 DOWNTO 0) :=  (OTHERS => '0');
+    rx_datain   : IN STD_LOGIC_VECTOR (0 DOWNTO 0);
+    rx_digitalreset   : IN STD_LOGIC_VECTOR (0 DOWNTO 0);
+    reconfig_fromgxb    : OUT STD_LOGIC_VECTOR (16 DOWNTO 0);
+    rx_clkout   : OUT STD_LOGIC_VECTOR (0 DOWNTO 0);
+    rx_ctrldetect   : OUT STD_LOGIC_VECTOR (1 DOWNTO 0);
+    rx_dataout    : OUT STD_LOGIC_VECTOR (15 DOWNTO 0);
+    rx_freqlocked   : OUT STD_LOGIC_VECTOR (0 DOWNTO 0)
+  );
+  END COMPONENT;  
 
-  COMPONENT ip_stratixiv_gxb_reconfig_4 IS
-  PORT (
-    reconfig_clk     : IN STD_LOGIC ;
-    reconfig_fromgxb : IN STD_LOGIC_VECTOR (67 DOWNTO 0);
-    busy             : OUT STD_LOGIC ;
-    reconfig_togxb   : OUT STD_LOGIC_VECTOR (3 DOWNTO 0)
+  COMPONENT ip_stratixiv_gxb_reconfig IS
+  GENERIC (
+    g_nof_gx        : NATURAL;
+    g_fromgxb_bus_w : NATURAL := 17;
+    g_togxb_bus_w   : NATURAL := 4
   );
-  END COMPONENT;
-  
-  COMPONENT ip_stratixiv_gxb_reconfig_2 IS
   PORT (
-    reconfig_clk     : IN STD_LOGIC ;
-    reconfig_fromgxb : IN STD_LOGIC_VECTOR (33 DOWNTO 0);
-    busy             : OUT STD_LOGIC ;
-    reconfig_togxb   : OUT STD_LOGIC_VECTOR (3 DOWNTO 0)
+    reconfig_clk     : IN STD_LOGIC;
+    reconfig_fromgxb : IN STD_LOGIC_VECTOR(g_nof_gx*g_fromgxb_bus_w-1 DOWNTO 0);
+    busy             : OUT STD_LOGIC;
+    reconfig_togxb   : OUT STD_LOGIC_VECTOR(g_togxb_bus_w-1 DOWNTO 0)
   );
   END COMPONENT;
-
+  
 END tech_transceiver_component_pkg;