Use default binary wrap by means of tx_mod=0.

libraries/base/diag/tb/vhdl/tb_mms_diag_seq.vhd

@@ -158,7 +158,7 @@ BEGIN
     tb_mode <= s_expect_ok;
     proc_diag_seq_tx_disable(c_st_0, mm_clk, dp_clk, reg_tx_miso, reg_tx_mosi, reg_rx_miso, reg_rx_mosi, rd_reg_arr(c_st_0));
     proc_diag_seq_rx_disable(c_st_0, mm_clk, dp_clk, reg_tx_miso, reg_tx_mosi, reg_rx_miso, reg_rx_mosi, rd_reg_arr(c_st_0));
-    proc_diag_seq_tx_enable(c_st_0, "CNTR", 17, mm_clk, dp_clk, reg_tx_miso, reg_tx_mosi, reg_rx_miso, reg_rx_mosi, rd_reg_arr(c_st_0));
+    proc_diag_seq_tx_enable(c_st_0, "CNTR", 17, 0, mm_clk, dp_clk, reg_tx_miso, reg_tx_mosi, reg_rx_miso, reg_rx_mosi, rd_reg_arr(c_st_0));
     proc_diag_seq_rx_enable(c_st_0, "CNTR", mm_clk, dp_clk, reg_tx_miso, reg_tx_mosi, reg_rx_miso, reg_rx_mosi, rd_reg_arr(c_st_0));
     
     -- Run test and read and verify Rx status
@@ -174,7 +174,7 @@ BEGIN
     -- Verify Tx and Rx on but with different pattern
     -------------------------------------------------------------------------
     tb_mode <= s_expect_error;
-    proc_diag_seq_tx_enable(c_st_0, "PSRG", 17, mm_clk, dp_clk, reg_tx_miso, reg_tx_mosi, reg_rx_miso, reg_rx_mosi, rd_reg_arr(c_st_0));
+    proc_diag_seq_tx_enable(c_st_0, "PSRG", 17, 0, mm_clk, dp_clk, reg_tx_miso, reg_tx_mosi, reg_rx_miso, reg_rx_mosi, rd_reg_arr(c_st_0));
     
     -- Run test and read and verify Rx status
     proc_common_wait_some_cycles(mm_clk, 200);
@@ -197,7 +197,7 @@ BEGIN
       tb_mode <= s_expect_ok;
       proc_diag_seq_tx_disable(c_st_0, mm_clk, dp_clk, reg_tx_miso, reg_tx_mosi, reg_rx_miso, reg_rx_mosi, rd_reg_arr(c_st_0));
       proc_diag_seq_rx_disable(c_st_0, mm_clk, dp_clk, reg_tx_miso, reg_tx_mosi, reg_rx_miso, reg_rx_mosi, rd_reg_arr(c_st_0));
-      proc_diag_seq_tx_enable(c_st_0, "CNTR", 17, mm_clk, dp_clk, reg_tx_miso, reg_tx_mosi, reg_rx_miso, reg_rx_mosi, rd_reg_arr(c_st_0));
+      proc_diag_seq_tx_enable(c_st_0, "CNTR", 17, 0, mm_clk, dp_clk, reg_tx_miso, reg_tx_mosi, reg_rx_miso, reg_rx_mosi, rd_reg_arr(c_st_0));
       proc_diag_seq_rx_enable(c_st_0, "CNTR", mm_clk, dp_clk, reg_tx_miso, reg_tx_mosi, reg_rx_miso, reg_rx_mosi, rd_reg_arr(c_st_0));
       
       -- Run test and read and verify Rx status
@@ -220,7 +220,7 @@ BEGIN
       tb_mode <= s_expect_ok;
       proc_diag_seq_tx_disable(c_st_0, mm_clk, dp_clk, reg_tx_miso, reg_tx_mosi, reg_rx_miso, reg_rx_mosi, rd_reg_arr(c_st_0));
       proc_diag_seq_rx_disable(c_st_0, mm_clk, dp_clk, reg_tx_miso, reg_tx_mosi, reg_rx_miso, reg_rx_mosi, rd_reg_arr(c_st_0));
-      proc_diag_seq_tx_enable(c_st_0, "CNTR", 17, mm_clk, dp_clk, reg_tx_miso, reg_tx_mosi, reg_rx_miso, reg_rx_mosi, rd_reg_arr(c_st_0));
+      proc_diag_seq_tx_enable(c_st_0, "CNTR", 17, 0, mm_clk, dp_clk, reg_tx_miso, reg_tx_mosi, reg_rx_miso, reg_rx_mosi, rd_reg_arr(c_st_0));
       proc_diag_seq_rx_enable(c_st_0, "CNTR", mm_clk, dp_clk, reg_tx_miso, reg_tx_mosi, reg_rx_miso, reg_rx_mosi, rd_reg_arr(c_st_0));
       
       -- Run test and read and verify Rx status
@@ -243,7 +243,7 @@ BEGIN
       -------------------------------------------------------------------------
       proc_diag_seq_tx_disable(c_st_1, mm_clk, dp_clk, reg_tx_miso, reg_tx_mosi, reg_rx_miso, reg_rx_mosi, rd_reg_arr(c_st_1));
       proc_diag_seq_rx_disable(c_st_1, mm_clk, dp_clk, reg_tx_miso, reg_tx_mosi, reg_rx_miso, reg_rx_mosi, rd_reg_arr(c_st_1));
-      proc_diag_seq_tx_enable(c_st_1, "CNTR", 17, mm_clk, dp_clk, reg_tx_miso, reg_tx_mosi, reg_rx_miso, reg_rx_mosi, rd_reg_arr(c_st_1));
+      proc_diag_seq_tx_enable(c_st_1, "CNTR", 17, 0, mm_clk, dp_clk, reg_tx_miso, reg_tx_mosi, reg_rx_miso, reg_rx_mosi, rd_reg_arr(c_st_1));
       proc_diag_seq_rx_enable(c_st_1, "CNTR", mm_clk, dp_clk, reg_tx_miso, reg_tx_mosi, reg_rx_miso, reg_rx_mosi, rd_reg_arr(c_st_1));
       
       -- Run test and read and verify Rx status