-Changed BG block size in VHDL.

applications/apertif/designs/apertif_unb1_fn_bf_emu/src/vhdl/apertif_unb1_fn_bf_emu.vhd

@@ -128,7 +128,7 @@ ARCHITECTURE str OF apertif_unb1_fn_bf_emu IS
   SIGNAL pout_wdi                   : STD_LOGIC;
 
   -- Block generator
-  CONSTANT c_bg_block_size          : NATURAL := 256;
+  CONSTANT c_bg_block_size          : NATURAL := 2*64; -- 2 interleaved streams
   CONSTANT c_bg_gapsize             : NATURAL := 0;
   CONSTANT c_bg_blocks_per_sync     : NATURAL := 781250;
   CONSTANT c_bg_ctrl                : t_diag_block_gen := (sel_a_b(g_sim, '1', '0'), -- enable: On by default in simulation; MM enable required on hardware.