Added a generate statement around the terminal node.

applications/apertif/designs/apertif_unb1_fn_beamformer/src/vhdl/node_apertif_unb1_fn_beamformer.vhd

@@ -106,7 +106,7 @@ ENTITY node_apertif_unb1_fn_beamformer IS
 
     -- Mesh interface level
     -- . Serial (tr_nonbonded)
-    tx_serial_2arr              : OUT t_unb1_board_mesh_sl_2arr;                            -- Tx
+    tx_serial_2arr              : OUT t_unb1_board_mesh_sl_2arr:= (OTHERS=>(OTHERS=>'0'));                            -- Tx
     rx_serial_2arr              : IN  t_unb1_board_mesh_sl_2arr:= (OTHERS=>(OTHERS=>'0'))   -- Rx support for diagnostics
   );
 END node_apertif_unb1_fn_beamformer;
@@ -118,8 +118,8 @@ ARCHITECTURE str OF node_apertif_unb1_fn_beamformer IS
   CONSTANT c_block_gen_file_prefix  : STRING := "hex/bg_in_data";
   CONSTANT c_ss_wide_file_prefix    : STRING := "hex/bf_ss_wide";
 
-  SIGNAL node_fn_term_out_sosi_arr  : t_dp_sosi_arr(g_nof_streams-1 DOWNTO 0);
-  SIGNAL node_fn_term_out_siso_arr  : t_dp_siso_arr(g_nof_streams-1 DOWNTO 0);
+  SIGNAL node_fn_term_out_sosi_arr  : t_dp_sosi_arr(g_nof_streams-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst);
+  SIGNAL node_fn_term_out_siso_arr  : t_dp_siso_arr(g_nof_streams-1 DOWNTO 0) := (OTHERS => c_dp_siso_rdy);
   SIGNAL node_bf_in_sosi_arr        : t_dp_sosi_arr( g_bf.nof_input_streams-1 DOWNTO 0); 
   SIGNAL node_bf_in_siso_arr        : t_dp_siso_arr( g_bf.nof_input_streams-1 DOWNTO 0); 
   
@@ -189,50 +189,51 @@ BEGIN
   -----------------------------------------------------------------------------
   -- Node function: Terminals + data buffer
   -----------------------------------------------------------------------------  
-  u_node_fn_terminal_db : ENTITY unb1_board_lib.node_unb1_fn_terminal_db
-  GENERIC MAP(
-    g_sim                       => g_sim,
-    g_sim_level                 => g_sim_level,
-    g_use_data_buf              => g_use_data_buf,
-    -- Terminals interface
-    g_multi_unb                 => TRUE,
-    -- Auxiliary Interface
-    g_aux                       => c_unb1_board_aux
-  )
-  PORT MAP(
-    -- System
-    mm_rst                      => mm_rst,
-    mm_clk                      => mm_clk,
-    dp_rst                      => dp_rst,
-    dp_clk                      => dp_clk,
-    dp_pps                      => dp_pps,
-    tr_mesh_clk                 => tr_mesh_clk,
-    cal_clk                     => cal_clk,
-
-    chip_id                     => chip_id,
-
-    -- MM interface
-    -- . tr_nonbonded
-    reg_tr_nonbonded_mosi       => reg_tr_nonbonded_mosi,
-    reg_tr_nonbonded_miso       => reg_tr_nonbonded_miso,
-    reg_diagnostics_mosi        => reg_diagnostics_mosi,
-    reg_diagnostics_miso        => reg_diagnostics_miso,
-    -- . diag_data_buffer
-    ram_diag_data_buf_mosi      => ram_diag_data_buf_mosi,
-    ram_diag_data_buf_miso      => ram_diag_data_buf_miso,
-    reg_diag_data_buf_mosi      => reg_diag_data_buf_mosi,
-    reg_diag_data_buf_miso      => reg_diag_data_buf_miso,
-    -- . bsn_monitor
-    reg_bsn_monitor_mosi        => reg_bsn_monitor_mosi,
-    reg_bsn_monitor_miso        => reg_bsn_monitor_miso,
+  gen_terminal : IF g_use_block_gen = FALSE GENERATE
+    u_node_fn_terminal_db : ENTITY unb1_board_lib.node_unb1_fn_terminal_db
+    GENERIC MAP(
+      g_sim                       => g_sim,
+      g_sim_level                 => g_sim_level,
+      g_use_data_buf              => g_use_data_buf,
+      -- Terminals interface
+      g_multi_unb                 => TRUE,
+      -- Auxiliary Interface
+      g_aux                       => c_unb1_board_aux
+    )
+    PORT MAP(
+      -- System
+      mm_rst                      => mm_rst,
+      mm_clk                      => mm_clk,
+      dp_rst                      => dp_rst,
+      dp_clk                      => dp_clk,
+      dp_pps                      => dp_pps,
+      tr_mesh_clk                 => tr_mesh_clk,
+      cal_clk                     => cal_clk,
     
-    -- Mesh interface
-    tx_serial_2arr              => tx_serial_2arr,
-    rx_serial_2arr              => rx_serial_2arr,
-
-    dp_out_sosi_arr             => node_fn_term_out_sosi_arr,
-    dp_out_siso_arr             => node_fn_term_out_siso_arr    
-  );
-
+      chip_id                     => chip_id,
+    
+      -- MM interface
+      -- . tr_nonbonded
+      reg_tr_nonbonded_mosi       => reg_tr_nonbonded_mosi,
+      reg_tr_nonbonded_miso       => reg_tr_nonbonded_miso,
+      reg_diagnostics_mosi        => reg_diagnostics_mosi,
+      reg_diagnostics_miso        => reg_diagnostics_miso,
+      -- . diag_data_buffer
+      ram_diag_data_buf_mosi      => ram_diag_data_buf_mosi,
+      ram_diag_data_buf_miso      => ram_diag_data_buf_miso,
+      reg_diag_data_buf_mosi      => reg_diag_data_buf_mosi,
+      reg_diag_data_buf_miso      => reg_diag_data_buf_miso,
+      -- . bsn_monitor
+      reg_bsn_monitor_mosi        => reg_bsn_monitor_mosi,
+      reg_bsn_monitor_miso        => reg_bsn_monitor_miso,
+      
+      -- Mesh interface
+      tx_serial_2arr              => tx_serial_2arr,
+      rx_serial_2arr              => rx_serial_2arr,
+    
+      dp_out_sosi_arr             => node_fn_term_out_sosi_arr,
+      dp_out_siso_arr             => node_fn_term_out_siso_arr    
+    );
+  END GENERATE;
 END str;