Support mixed width data that uses a power of 2 multiple, so not only 1 or 2, but also 4, 8, etc.

libraries/base/diag/src/vhdl/diag_data_buffer.vhd

@@ -24,6 +24,7 @@ USE IEEE.std_logic_1164.ALL;
 USE IEEE.numeric_std.ALL;
 USE common_lib.common_pkg.ALL;
 USE common_lib.common_mem_pkg.ALL;
+USE work.diag_pkg.ALL;
 
 -- Purpose : Capture a block of streaming data for analysis via MM access
 -- Description :
@@ -35,6 +36,9 @@ USE common_lib.common_mem_pkg.ALL;
 -- Remarks:
 -- . The actual RAM usage depends on g_data_w. Unused bits are forced to '0'
 --   when read.
+-- . The c_mm_factor must be a power of 2 factor. Typically c_mm_factor=1 is
+--   sufficient for most purposes. If the application only requires
+--   eg. c_mm_factor=3 then it needs to extend the data to c_mm_factor=4.
 -- . If c_mm_factor=2 then in_data[g_data_w/2-1:0] will appear at MM address
 --   even and in_data[g_data_w-1:g_data_w/2] at address odd.
 --   The advantage of splitting at g_data_w/2 instead of at c_word_w=32 is
@@ -42,7 +46,9 @@ USE common_lib.common_mem_pkg.ALL;
 --   RAM block. Whereas mapping the LS 32b part at even address and the MS 4b
 --   part at odd address would require using c_word_w=32b RAM that could
 --   require two RAM blocks. For g_data_w=2*c_word_w=64b there is no
---   difference between these 2 schemes.
+--   difference between these 2 schemes. Hence by rising the g_data_w to a
+--   power of 2 multiple of 32b the user can enforce using splitting the data
+--   a c_word_w parts.
 
 ENTITY diag_data_buffer IS
   GENERIC (
@@ -74,7 +80,7 @@ END diag_data_buffer;
 
 ARCHITECTURE rtl OF diag_data_buffer IS
 
-  CONSTANT c_mm_factor     : NATURAL := ceil_div(g_data_w, c_word_w);  -- only support c_mm_factor=1 or 2
+  CONSTANT c_mm_factor     : NATURAL := ceil_div(g_data_w, c_word_w);  -- must be a power of 2 multiple
   
   CONSTANT c_nof_data_mm   : NATURAL := g_nof_data*c_mm_factor;
   CONSTANT g_data_mm_w     : NATURAL := g_data_w/c_mm_factor;
@@ -91,11 +97,10 @@ ARCHITECTURE rtl OF diag_data_buffer IS
                                          nof_dat  => g_nof_data,
                                          init_sl  => '0');
 
-  CONSTANT c_reg_nof_words : NATURAL := 2; -- 1: word_cnt; 0:sync_cnt
   CONSTANT c_reg           : t_c_mem := (latency  => 1,
-                                         adr_w    => ceil_log2(c_reg_nof_words),   
+                                         adr_w    => c_diag_db_reg_adr_w,   
                                          dat_w    => c_word_w,       -- Use MM bus data width = c_word_w = 32 for all MM registers
-                                         nof_dat  => c_reg_nof_words,
+                                         nof_dat  => c_diag_db_reg_nof_dat,   -- 1: word_cnt; 0:sync_cnt
                                          init_sl  => '0');
                 
   SIGNAL i_ram_mm_miso   : t_mem_miso := c_mem_miso_rst;   -- used to avoid vsim-8684 error "No drivers exist" for the unused fields
@@ -113,8 +118,8 @@ ARCHITECTURE rtl OF diag_data_buffer IS
   SIGNAL wr_en           : STD_LOGIC;
   SIGNAL nxt_wr_en       : STD_LOGIC;
 
-  SIGNAL reg_rd_arr      : STD_LOGIC_VECTOR(c_reg_nof_words-1 DOWNTO 0);
-  SIGNAL reg_slv         : STD_LOGIC_VECTOR(c_reg_nof_words*c_word_w-1 DOWNTO 0);
+  SIGNAL reg_rd_arr      : STD_LOGIC_VECTOR(c_reg.nof_dat-1 DOWNTO 0);
+  SIGNAL reg_slv         : STD_LOGIC_VECTOR(c_reg.nof_dat*c_word_w-1 DOWNTO 0);
 
   SIGNAL sync_cnt_clr    : STD_LOGIC := '0';  
   SIGNAL sync_cnt        : STD_LOGIC_VECTOR(c_word_w-1 DOWNTO 0); -- Nof times buffer has been written
@@ -122,7 +127,7 @@ ARCHITECTURE rtl OF diag_data_buffer IS
   
 BEGIN
   
-  ASSERT c_mm_factor=1 OR c_mm_factor=2 REPORT "Only support mixed width c_mm_factor = 1 or 2" SEVERITY FAILURE;
+  ASSERT c_mm_factor=2**true_log2(c_mm_factor) REPORT "Only support mixed width data that uses a power of 2 multiple." SEVERITY FAILURE;
   
   ram_mm_miso <= i_ram_mm_miso;
       

libraries/base/diag/src/vhdl/mms_diag_data_buffer.vhd

@@ -104,10 +104,11 @@ END mms_diag_data_buffer;
 
 ARCHITECTURE str OF mms_diag_data_buffer IS
 
-  CONSTANT c_buf_nof_data_mm : NATURAL := g_buf_nof_data*ceil_div(g_data_w, c_word_w);
+  CONSTANT c_buf_mm_factor   : NATURAL := ceil_div(g_data_w, c_word_w);
+  CONSTANT c_buf_nof_data_mm : NATURAL := g_buf_nof_data*c_buf_mm_factor;
 
   CONSTANT c_buf_adr_w : NATURAL := ceil_log2(c_buf_nof_data_mm);
-  CONSTANT c_reg_adr_w : NATURAL := ceil_log2(2);
+  CONSTANT c_reg_adr_w : NATURAL := c_diag_db_reg_adr_w;
 
   TYPE t_data_arr IS ARRAY (INTEGER RANGE <>) OF STD_LOGIC_VECTOR(g_data_w-1 DOWNTO 0);