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Commit 96c4b8ac authored by Reinier van der Walle's avatar Reinier van der Walle
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fixed compile errors

parent b8cb3a81
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1 merge request!226Resolve L2SDP-176
Pipeline #26820 passed
...@@ -475,13 +475,13 @@ ARCHITECTURE tb OF tb_lofar2_unb2c_sdp_station_bf_ring IS ...@@ -475,13 +475,13 @@ ARCHITECTURE tb OF tb_lofar2_unb2c_sdp_station_bf_ring IS
SIGNAL eth_rxp : STD_LOGIC_VECTOR(c_unb2c_board_nof_eth-1 downto 0); SIGNAL eth_rxp : STD_LOGIC_VECTOR(c_unb2c_board_nof_eth-1 downto 0);
SIGNAL SA_CLK : STD_LOGIC := '1'; SIGNAL SA_CLK : STD_LOGIC := '1';
SIGNAL i_QSFP_0_TX : t_unb2b_board_qsfp_bus_2arr(c_nof_rn -1 DOWNTO 0) := (OTHERS => (OTHERS => '0')); SIGNAL i_QSFP_0_TX : t_unb2c_board_qsfp_bus_2arr(c_nof_rn -1 DOWNTO 0) := (OTHERS => (OTHERS => '0'));
SIGNAL i_QSFP_0_RX : t_unb2b_board_qsfp_bus_2arr(c_nof_rn -1 DOWNTO 0) := (OTHERS => (OTHERS => '0')); SIGNAL i_QSFP_0_RX : t_unb2c_board_qsfp_bus_2arr(c_nof_rn -1 DOWNTO 0) := (OTHERS => (OTHERS => '0'));
SIGNAL i_RING_0_TX : t_unb2b_board_qsfp_bus_2arr(c_nof_rn -1 DOWNTO 0) := (OTHERS => (OTHERS => '0')); SIGNAL i_RING_0_TX : t_unb2c_board_qsfp_bus_2arr(c_nof_rn -1 DOWNTO 0) := (OTHERS => (OTHERS => '0'));
SIGNAL i_RING_0_RX : t_unb2b_board_qsfp_bus_2arr(c_nof_rn -1 DOWNTO 0) := (OTHERS => (OTHERS => '0')); SIGNAL i_RING_0_RX : t_unb2c_board_qsfp_bus_2arr(c_nof_rn -1 DOWNTO 0) := (OTHERS => (OTHERS => '0'));
SIGNAL i_RING_1_TX : t_unb2b_board_qsfp_bus_2arr(c_nof_rn -1 DOWNTO 0) := (OTHERS => (OTHERS => '0')); SIGNAL i_RING_1_TX : t_unb2c_board_qsfp_bus_2arr(c_nof_rn -1 DOWNTO 0) := (OTHERS => (OTHERS => '0'));
SIGNAL i_RING_1_RX : t_unb2b_board_qsfp_bus_2arr(c_nof_rn -1 DOWNTO 0) := (OTHERS => (OTHERS => '0')); SIGNAL i_RING_1_RX : t_unb2c_board_qsfp_bus_2arr(c_nof_rn -1 DOWNTO 0) := (OTHERS => (OTHERS => '0'));
SIGNAL i_QSFP_1_lpbk : t_unb2b_board_qsfp_bus_2arr(c_nof_rn -1 DOWNTO 0) := (OTHERS => (OTHERS => '0')); SIGNAL i_QSFP_1_lpbk : t_unb2c_board_qsfp_bus_2arr(c_nof_rn -1 DOWNTO 0) := (OTHERS => (OTHERS => '0'));
-- back transceivers -- back transceivers
SIGNAL JESD204B_SERIAL_DATA : STD_LOGIC_VECTOR(c_sdp_S_pn-1 downto 0); SIGNAL JESD204B_SERIAL_DATA : STD_LOGIC_VECTOR(c_sdp_S_pn-1 downto 0);
...@@ -516,62 +516,63 @@ BEGIN ...@@ -516,62 +516,63 @@ BEGIN
-- DUT -- DUT
------------------------------------------------------------------------------ ------------------------------------------------------------------------------
gen_dut : FOR RN IN 0 TO c_nof_rn -1 GENERATE gen_dut : FOR RN IN 0 TO c_nof_rn -1 GENERATE
u_lofar_unb2c_sdp_station_bf : ENTITY lofar2_unb2c_sdp_station_lib.lofar2_unb2c_sdp_station u_lofar_unb2c_sdp_station_bf : ENTITY lofar2_unb2c_sdp_station_lib.lofar2_unb2c_sdp_station
GENERIC MAP ( GENERIC MAP (
g_design_name => "lofar2_unb2c_sdp_station_bf_ring", g_design_name => "lofar2_unb2c_sdp_station_bf_ring",
g_design_note => "", g_design_note => "",
g_sim => c_sim, g_sim => c_sim,
g_sim_unb_nr => c_unb_nr + (RN / c_quad), g_sim_unb_nr => c_unb_nr + (RN / c_quad),
g_sim_node_nr => RN MOD c_quad, g_sim_node_nr => RN MOD c_quad,
g_wpfb => c_wpfb_sim, g_wpfb => c_wpfb_sim,
g_bsn_nof_clk_per_sync => c_nof_clk_per_sync, g_bsn_nof_clk_per_sync => c_nof_clk_per_sync,
g_scope_selected_subband => g_subband g_scope_selected_subband => g_subband
) )
PORT MAP ( PORT MAP (
-- GENERAL -- GENERAL
CLK => ext_clk, CLK => ext_clk,
PPS => ext_pps, PPS => ext_pps,
WDI => WDI, WDI => WDI,
INTA => INTA, INTA => INTA,
INTB => INTB, INTB => INTB,
-- Others -- Others
VERSION => c_version, VERSION => c_version,
ID => ( TO_UVEC(RN / c_quad, c_unb2b_board_nof_uniboard_w) & TO_UVEC(RN MOD c_quad, c_unb2b_board_nof_chip_w) ), ID => ( TO_UVEC(RN / c_quad, c_unb2c_board_nof_uniboard_w) & TO_UVEC(RN MOD c_quad, c_unb2c_board_nof_chip_w) ),
TESTIO => open, TESTIO => open,
-- 1GbE Control Interface -- 1GbE Control Interface
ETH_CLK => eth_clk, ETH_CLK => eth_clk,
ETH_SGIN => eth_rxp, ETH_SGIN => eth_rxp,
ETH_SGOUT => eth_txp, ETH_SGOUT => eth_txp,
-- Transceiver clocks -- Transceiver clocks
SA_CLK => SA_CLK, SA_CLK => SA_CLK,
-- front transceivers for ring -- front transceivers for ring
QSFP_0_RX => i_QSFP_0_RX(RN), QSFP_0_RX => i_QSFP_0_RX(RN),
QSFP_0_TX => i_QSFP_0_TX(RN), QSFP_0_TX => i_QSFP_0_TX(RN),
-- ring transceivers -- ring transceivers
RING_0_RX => i_RING_0_RX(RN), RING_0_RX => i_RING_0_RX(RN),
RING_0_TX => i_RING_0_TX(RN), RING_0_TX => i_RING_0_TX(RN),
RING_1_RX => i_RING_1_RX(RN), RING_1_RX => i_RING_1_RX(RN),
RING_1_TX => i_RING_1_TX(RN), RING_1_TX => i_RING_1_TX(RN),
-- front transceivers for CEP -- front transceivers for CEP
QSFP_1_RX => i_QSFP_1_lpbk(RN), QSFP_1_RX => i_QSFP_1_lpbk(RN),
QSFP_1_TX => i_QSFP_1_lpbk(RN), QSFP_1_TX => i_QSFP_1_lpbk(RN),
-- LEDs -- LEDs
QSFP_LED => open, QSFP_LED => open,
-- back transceivers -- back transceivers
JESD204B_SERIAL_DATA => JESD204B_SERIAL_DATA, JESD204B_SERIAL_DATA => JESD204B_SERIAL_DATA,
JESD204B_REFCLK => JESD204B_REFCLK, JESD204B_REFCLK => JESD204B_REFCLK,
-- jesd204b syncronization signals -- jesd204b syncronization signals
JESD204B_SYSREF => jesd204b_sysref, JESD204B_SYSREF => jesd204b_sysref,
JESD204B_SYNC_N => jesd204b_sync_n JESD204B_SYNC_N => jesd204b_sync_n
); );
END GENERATE;
-- Ring connections -- Ring connections
gen_ring : FOR I IN 0 TO c_nof_rn -2 GENERATE gen_ring : FOR I IN 0 TO c_nof_rn -2 GENERATE
...@@ -621,7 +622,7 @@ BEGIN ...@@ -621,7 +622,7 @@ BEGIN
dp_rst => dest_rst, dp_rst => dest_rst,
dp_clk => ext_clk, dp_clk => ext_clk,
serial_rx_arr(0) => i_QSFP_1_lpbk(0), -- Using RN 0 as end node. serial_rx_arr(0) => i_QSFP_1_lpbk(0)(0), -- Using RN 0 as end node.
src_out_arr(0) => tr_10GbE_src_out, src_out_arr(0) => tr_10GbE_src_out,
src_in_arr(0) => tr_10GbE_src_in src_in_arr(0) => tr_10GbE_src_in
...@@ -861,6 +862,7 @@ BEGIN ...@@ -861,6 +862,7 @@ BEGIN
ELSE ELSE
-- Set transport_nof_hops to 1 on all nodes. -- Set transport_nof_hops to 1 on all nodes.
mmf_mm_bus_wr(mmf_unb_file_prefix(c_unb_nr + (RN / c_quad), RN MOD c_quad) & "REG_RING_LANE_INFO_BF", I*2+1, 1, tb_clk); mmf_mm_bus_wr(mmf_unb_file_prefix(c_unb_nr + (RN / c_quad), RN MOD c_quad) & "REG_RING_LANE_INFO_BF", I*2+1, 1, tb_clk);
END IF;
END LOOP; END LOOP;
END LOOP; END LOOP;
...@@ -885,6 +887,7 @@ BEGIN ...@@ -885,6 +887,7 @@ BEGIN
mmf_mm_bus_wr(mmf_unb_file_prefix(c_unb_nr + (RN / c_quad), RN MOD c_quad) & "REG_WG", I*4 + 1, INTEGER(c_wg_remnant_phase * c_diag_wg_phase_unit), tb_clk); -- phase offset in degrees mmf_mm_bus_wr(mmf_unb_file_prefix(c_unb_nr + (RN / c_quad), RN MOD c_quad) & "REG_WG", I*4 + 1, INTEGER(c_wg_remnant_phase * c_diag_wg_phase_unit), tb_clk); -- phase offset in degrees
mmf_mm_bus_wr(mmf_unb_file_prefix(c_unb_nr + (RN / c_quad), RN MOD c_quad) & "REG_WG", I*4 + 2, INTEGER(REAL(g_subband) * c_wg_subband_freq_unit), tb_clk); -- freq mmf_mm_bus_wr(mmf_unb_file_prefix(c_unb_nr + (RN / c_quad), RN MOD c_quad) & "REG_WG", I*4 + 2, INTEGER(REAL(g_subband) * c_wg_subband_freq_unit), tb_clk); -- freq
mmf_mm_bus_wr(mmf_unb_file_prefix(c_unb_nr + (RN / c_quad), RN MOD c_quad) & "REG_WG", I*4 + 3, INTEGER(REAL(c_wg_remnant_ampl) * c_wg_ampl_lsb), tb_clk); -- ampl mmf_mm_bus_wr(mmf_unb_file_prefix(c_unb_nr + (RN / c_quad), RN MOD c_quad) & "REG_WG", I*4 + 3, INTEGER(REAL(c_wg_remnant_ampl) * c_wg_ampl_lsb), tb_clk); -- ampl
END IF;
END LOOP; END LOOP;
END LOOP; END LOOP;
......
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