fixed compile errors

applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_bf_ring/tb_lofar2_unb2c_sdp_station_bf_ring.vhd

@@ -475,13 +475,13 @@ ARCHITECTURE tb OF tb_lofar2_unb2c_sdp_station_bf_ring IS
   SIGNAL eth_rxp             : STD_LOGIC_VECTOR(c_unb2c_board_nof_eth-1 downto 0);
 
   SIGNAL SA_CLK              : STD_LOGIC := '1';
-  SIGNAL i_QSFP_0_TX         : t_unb2b_board_qsfp_bus_2arr(c_nof_rn -1 DOWNTO 0) := (OTHERS => (OTHERS => '0'));
-  SIGNAL i_QSFP_0_RX         : t_unb2b_board_qsfp_bus_2arr(c_nof_rn -1 DOWNTO 0) := (OTHERS => (OTHERS => '0'));
-  SIGNAL i_RING_0_TX         : t_unb2b_board_qsfp_bus_2arr(c_nof_rn -1 DOWNTO 0) := (OTHERS => (OTHERS => '0'));
-  SIGNAL i_RING_0_RX         : t_unb2b_board_qsfp_bus_2arr(c_nof_rn -1 DOWNTO 0) := (OTHERS => (OTHERS => '0'));
-  SIGNAL i_RING_1_TX         : t_unb2b_board_qsfp_bus_2arr(c_nof_rn -1 DOWNTO 0) := (OTHERS => (OTHERS => '0'));
-  SIGNAL i_RING_1_RX         : t_unb2b_board_qsfp_bus_2arr(c_nof_rn -1 DOWNTO 0) := (OTHERS => (OTHERS => '0'));
-  SIGNAL i_QSFP_1_lpbk       : t_unb2b_board_qsfp_bus_2arr(c_nof_rn -1 DOWNTO 0) := (OTHERS => (OTHERS => '0'));
+  SIGNAL i_QSFP_0_TX         : t_unb2c_board_qsfp_bus_2arr(c_nof_rn -1 DOWNTO 0) := (OTHERS => (OTHERS => '0'));
+  SIGNAL i_QSFP_0_RX         : t_unb2c_board_qsfp_bus_2arr(c_nof_rn -1 DOWNTO 0) := (OTHERS => (OTHERS => '0'));
+  SIGNAL i_RING_0_TX         : t_unb2c_board_qsfp_bus_2arr(c_nof_rn -1 DOWNTO 0) := (OTHERS => (OTHERS => '0'));
+  SIGNAL i_RING_0_RX         : t_unb2c_board_qsfp_bus_2arr(c_nof_rn -1 DOWNTO 0) := (OTHERS => (OTHERS => '0'));
+  SIGNAL i_RING_1_TX         : t_unb2c_board_qsfp_bus_2arr(c_nof_rn -1 DOWNTO 0) := (OTHERS => (OTHERS => '0'));
+  SIGNAL i_RING_1_RX         : t_unb2c_board_qsfp_bus_2arr(c_nof_rn -1 DOWNTO 0) := (OTHERS => (OTHERS => '0'));
+  SIGNAL i_QSFP_1_lpbk       : t_unb2c_board_qsfp_bus_2arr(c_nof_rn -1 DOWNTO 0) := (OTHERS => (OTHERS => '0'));
 
   -- back transceivers
   SIGNAL JESD204B_SERIAL_DATA : STD_LOGIC_VECTOR(c_sdp_S_pn-1 downto 0);
@@ -537,7 +537,7 @@ BEGIN
 
       -- Others
       VERSION      => c_version,
-    ID           => ( TO_UVEC(RN / c_quad, c_unb2b_board_nof_uniboard_w) & TO_UVEC(RN MOD c_quad, c_unb2b_board_nof_chip_w) ),
+      ID           => ( TO_UVEC(RN / c_quad, c_unb2c_board_nof_uniboard_w) & TO_UVEC(RN MOD c_quad, c_unb2c_board_nof_chip_w) ),
       TESTIO       => open,
 
       -- 1GbE Control Interface
@@ -572,6 +572,7 @@ BEGIN
       JESD204B_SYSREF => jesd204b_sysref,
       JESD204B_SYNC_N => jesd204b_sync_n
     );
+  END GENERATE;
 
   -- Ring connections
   gen_ring : FOR I IN 0 TO c_nof_rn -2 GENERATE
@@ -621,7 +622,7 @@ BEGIN
     dp_rst              => dest_rst,
     dp_clk              => ext_clk,
 
-    serial_rx_arr(0)    => i_QSFP_1_lpbk(0), -- Using RN 0 as end node.
+    serial_rx_arr(0)    => i_QSFP_1_lpbk(0)(0), -- Using RN 0 as end node.
 
     src_out_arr(0)      => tr_10GbE_src_out,
     src_in_arr(0)       => tr_10GbE_src_in
@@ -861,6 +862,7 @@ BEGIN
         ELSE
           -- Set transport_nof_hops to 1 on all nodes.
           mmf_mm_bus_wr(mmf_unb_file_prefix(c_unb_nr + (RN / c_quad), RN MOD c_quad) & "REG_RING_LANE_INFO_BF", I*2+1, 1, tb_clk);
+        END IF;
       END LOOP;
     END LOOP;
 
@@ -885,6 +887,7 @@ BEGIN
           mmf_mm_bus_wr(mmf_unb_file_prefix(c_unb_nr + (RN / c_quad), RN MOD c_quad) & "REG_WG", I*4 + 1, INTEGER(c_wg_remnant_phase * c_diag_wg_phase_unit), tb_clk);  -- phase offset in degrees
           mmf_mm_bus_wr(mmf_unb_file_prefix(c_unb_nr + (RN / c_quad), RN MOD c_quad) & "REG_WG", I*4 + 2, INTEGER(REAL(g_subband) * c_wg_subband_freq_unit), tb_clk);  -- freq
           mmf_mm_bus_wr(mmf_unb_file_prefix(c_unb_nr + (RN / c_quad), RN MOD c_quad) & "REG_WG", I*4 + 3, INTEGER(REAL(c_wg_remnant_ampl) * c_wg_ampl_lsb), tb_clk);  -- ampl
+        END IF;
       END LOOP;
     END LOOP;