Added c_tech_ddr_phy_*_x constants.

libraries/technology/ddr/tech_ddr_pkg.vhd

@@ -98,6 +98,10 @@ PACKAGE tech_ddr_pkg IS
     parallelterminationcontrol : STD_LOGIC_VECTOR(c_tech_ddr_max.terminationcontrol_w-1 DOWNTO 0);   -- termination control from master to slave DDR3 PHY (internal signal in FPGA)
   END RECORD;
 
+  CONSTANT c_tech_ddr_phy_in_x     : t_tech_ddr_phy_in := ('X', 'X', 'X', (OTHERS=>'X'), (OTHERS=>'X'));
+  CONSTANT c_tech_ddr_phy_io_x     : t_tech_ddr_phy_io := ((OTHERS=>'X'), (OTHERS=>'X'), (OTHERS=>'X'), 'X', 'X');
+  CONSTANT c_tech_ddr_phy_ou_x     : t_tech_ddr_phy_ou := ((OTHERS=>'X'), (OTHERS=>'X'), (OTHERS=>'X'), 'X', 'X', 'X', 'X', (OTHERS=>'X'), (OTHERS=>'X'), (OTHERS=>'X'), (OTHERS=>'X'), (OTHERS=>'X'), (OTHERS=>'X'), (OTHERS=>'X'));
+  
   CONSTANT c_tech_ddr_phy_in_rst   : t_tech_ddr_phy_in := ('0', 'X', 'X', (OTHERS=>'X'), (OTHERS=>'X'));
   CONSTANT c_tech_ddr_phy_io_rst   : t_tech_ddr_phy_io := ((OTHERS=>'0'), (OTHERS=>'0'), (OTHERS=>'0'), '0', '0');
   CONSTANT c_tech_ddr_phy_ou_rst   : t_tech_ddr_phy_ou := ((OTHERS=>'0'), (OTHERS=>'0'), (OTHERS=>'0'), '0', '0', '0', '0', (OTHERS=>'0'), (OTHERS=>'0'), (OTHERS=>'0'), (OTHERS=>'0'), (OTHERS=>'0'), (OTHERS=>'0'), (OTHERS=>'0'));