initial add of the yaml files for unb2b_minimal

boards/uniboard2b/designs/unb2b_minimal/unb2b_minimal.fpga.yaml

+schema_name   : args
+schema_version: 1.0
+schema_type   : fpga
+
+hdl_library_name: unb2b_minimal
+fpga_name       : unb2b_minimal
+fpga_description: "unb2b_minimal system"
+
+peripherals:
+  - peripheral_name: unb2b_board/system
+    slave_port_names:
+      - pio_system_info
+  - peripheral_name: unb2b_board/rom_system
+    slave_port_names:
+      - rom_system_info
+  - peripheral_name: unb2b_board/ctrl
+    slave_port_names:
+      - pio_wdi
+  - peripheral_name: unb2b_board/wdi
+    slave_port_names:
+      - reg_wdi
+  - peripheral_name: eth/eth1g
+    slave_port_names:
+      - avs_eth_0_tse
+      - avs_eth_0_reg
+      - avs_eth_0_ram
+  - peripheral_name: ppsh/ppsh
+    slave_port_names:
+      - pio_pps
+  - peripheral_name: epcs/epcs
+    slave_port_names:
+      - reg_epcs
+      - reg_dpmm_ctrl
+      - reg_dpmm_data
+      - reg_mmdp_ctrl
+      - reg_mmdp_data
+    parameter_overrides:
+      - { name : g_sim_flash_model, value: FALSE }
+  - peripheral_name: remu/remu
+    slave_port_names:
+      - reg_remu
+  - peripheral_name: unb2b_board/sens
+    slave_port_names:
+      - reg_unb_sens
+    parameter_overrides:
+      - { name : g_sim,       value: FALSE }
+      - { name : g_clk_freq,  value: 125E6 }
+      - { name : g_temp_high, value: 85 }

boards/uniboard2b/libraries/unb2b_board/unb2b_board.peripheral.yaml

+schema_name   : args
+schema_version: 1.0
+schema_type   : peripheral
+
+hdl_library_name       : unb2b_board
+hdl_library_description: " This is the description for the unb2b_board package "
+
+# <peripheral_group>_<peripheral_name>_<slave_name>_<slave_type>
+
+peripherals:
+  - peripheral_name: rom_system
+    slave_ports:
+        # rom_system_info
+      - slave_name   : info  
+        slave_type   : REG
+        fields:
+          - - field_name    : info
+              access_mode   : RO
+              address_offset: 0x0
+              number_of_fields: 1024
+              field_description: |
+                  "address place for rom_system_info"
+        slave_description: " rom_info  "
+        
+    peripheral_description: |
+        " settings for rom_system_info register "
+  
+  - peripheral_name: system
+    slave_ports:
+        # reg_system_info
+      - slave_name   : info  
+        slave_type   : REG
+        fields:
+          - - field_name    : info
+              access_mode   : RO
+              address_offset: 0x0
+              number_of_fields: 32
+              field_description: |
+                  "address place for reg_system_info"
+        slave_description: " reg_info "
+        
+    peripheral_description: |
+        " settings for reg_system_info register "
+
+  # peripheral, unb2b_board_wdi_reg
+  - peripheral_name: ctrl
+
+    slave_ports:
+      # actual hdl name: unb2b_board_wdi_reg
+      - slave_name   : pio_wdi
+        slave_type   : REG
+        fields:
+          - - field_name      : nios_reset
+              width           : 32
+              access_mode     : WO
+              address_offset  : 0x0
+              number_of_fields: 1
+              field_description: " Reset done by nios "
+         
+        slave_description:  "Reset register, for nios "
+    
+    peripheral_description: " "
+  
+  # peripheral, unb2b_board_wdi_reg
+  - peripheral_name: wdi
+
+    slave_ports:
+      # actual hdl name: unb2b_board_wdi_reg
+      - slave_name   : wdi
+        slave_type   : REG
+        fields:
+          - - field_name    : reset_word
+              access_mode   : WO
+              address_offset: 0x0
+              field_description: " Only the value 0xB007FAC7 'Boot factory' will result in a reset "
+           
+        slave_description:  "Reset register, if the right value is provided the factory image will be reloaded "
+    
+    peripheral_description: " "
+  
+  # periheral, unb2b_board_sens
+  - peripheral_name: sens
+
+    parameters:
+      - { name: g_sim,       value: FALSE }
+      - { name: g_clk_freq,  value: c_unb2b_board_mm_clk_freq_125M }
+      - { name: g_temp_high, value: 85 }
+
+    slave_ports:
+      # actual hdl name: reg_unb2b_sens
+      - slave_name   : sens
+        slave_type   : REG
+        fields:
+          - - field_name    : sens_data
+              width         : 8
+              access_mode   : RO
+              address_offset: 0x0
+              number_of_fields: 4
+              field_description: | 
+                  " data array with sens data 
+                  0x0 = fpga temperature in degrees (two's complement) 
+                  0x1 = eth_temp temperature in degrees (two's complement)
+                  0x2 = hot_swap_v_sens
+                  0x3 = hot_swap_v_source"
+          
+          - - field_name    : sens_err
+              width         : 1
+              access_mode   : RO
+              address_offset: 0x10
+              radix         : unsigned 
+              field_description: ""
+        
+          - - field_name    : temp_high
+              width         : 7
+              address_offset: 0x14
+              reset_value   : g_temp_high
+              software_value: g_temp_high
+              field_description: ""
+
+        slave_description:  " "
+    
+    peripheral_description: |
+        "
+        +-----------------------------------------------------------------------------+
+        |31   (byte3)   24|23   (byte2)   16|15   (byte1)    8|7    (byte0)    0|  wi |
+        |-----------------------------------------------------------------------|-----|
+        |                xxx                     fpga_temp   = sens_data[0][7:0]|  0  |
+        |-----------------------------------------------------------------------|-----|
+        |                xxx                     eth_temp    = sens_data[1][7:0]|  1  |
+        |-----------------------------------------------------------------------|-----|
+        |                xxx               hot_swap_v_sense  = sens_data[2][7:0]|  2  |
+        |-----------------------------------------------------------------------|-----|
+        |                xxx               hot_swap_v_source = sens_data[3][7:0]|  3  |
+        |-----------------------------------------------------------------------|-----|
+        |                xxx                                         sens_err[0]|  4  |
+        |-----------------------------------------------------------------------|-----|
+        |                xxx                                      temp_high[6:0]|  5  |
+        +-----------------------------------------------------------------------------+
+        * The fpga_temp and eth_temp are in degrees (two's complement)
+        * The hot swap voltages depend on:
+            . From i2c_dev_ltc4260_pkg:
+                LTC4260_V_UNIT_SENSE        = 0.0003  --   0.3 mV over Rs for current sense
+                LTC4260_V_UNIT_SOURCE       = 0.4     -- 400   mV supply voltage (e.g +48 V)
+                LTC4260_V_UNIT_ADIN         = 0.01    --  10   mV ADC
+     
+            . From UniBoard unb_sensors.h:
+                SENS_HOT_SWAP_R_SENSE       = 0.005   -- R sense on UniBoard is 5 mOhm (~= 10 mOhm // 10 mOhm)
+                SENS_HOT_SWAP_I_UNIT_SENSE  = LTC4260_V_UNIT_SENSE / SENS_HOT_SWAP_R_SENSE
+                SENS_HOT_SWAP_V_UNIT_SOURCE = LTC4260_V_UNIT_SOURCE
+     
+        ==> 
+            Via all FN and BN:
+            0 = FPGA temperature                 = TInt8(fpga_temp)
+            Only via BN3:
+            1 = UniBoard ETH PHY temperature     = TInt8(eth_temp)
+            2 = UniBoard hot swap supply current = hot_swap_v_sense * SENS_HOT_SWAP_I_UNIT_SENSE
+            3 = UniBoard hot swap supply voltage = hot_swap_v_source * SENS_HOT_SWAP_V_UNIT_SOURCE
+            4 = I2C error status for BN3 sensors access only, 0 = ok"
+