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Commit 91da2adc authored by Reinier van der Walle's avatar Reinier van der Walle
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updated address width of dp_block_validate_bsn_at_sync

parent 3a725dca
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1 merge request!176Updated lofar2_unb2b_ring design for synthesis, also created
...@@ -99,7 +99,7 @@ PACKAGE qsys_lofar2_unb2b_ring_pkg IS ...@@ -99,7 +99,7 @@ PACKAGE qsys_lofar2_unb2b_ring_pkg IS
reg_diag_bg_reset_export : out std_logic; -- export reg_diag_bg_reset_export : out std_logic; -- export
reg_diag_bg_write_export : out std_logic; -- export reg_diag_bg_write_export : out std_logic; -- export
reg_diag_bg_writedata_export : out std_logic_vector(31 downto 0); -- export reg_diag_bg_writedata_export : out std_logic_vector(31 downto 0); -- export
reg_dp_block_validate_bsn_at_sync_address_export : out std_logic_vector(3 downto 0); -- export reg_dp_block_validate_bsn_at_sync_address_export : out std_logic_vector(4 downto 0); -- export
reg_dp_block_validate_bsn_at_sync_clk_export : out std_logic; -- export reg_dp_block_validate_bsn_at_sync_clk_export : out std_logic; -- export
reg_dp_block_validate_bsn_at_sync_read_export : out std_logic; -- export reg_dp_block_validate_bsn_at_sync_read_export : out std_logic; -- export
reg_dp_block_validate_bsn_at_sync_readdata_export : in std_logic_vector(31 downto 0) := (others => 'X'); -- export reg_dp_block_validate_bsn_at_sync_readdata_export : in std_logic_vector(31 downto 0) := (others => 'X'); -- export
......
...@@ -99,7 +99,7 @@ PACKAGE qsys_lofar2_unb2c_ring_pkg IS ...@@ -99,7 +99,7 @@ PACKAGE qsys_lofar2_unb2c_ring_pkg IS
reg_diag_bg_reset_export : out std_logic; -- export reg_diag_bg_reset_export : out std_logic; -- export
reg_diag_bg_write_export : out std_logic; -- export reg_diag_bg_write_export : out std_logic; -- export
reg_diag_bg_writedata_export : out std_logic_vector(31 downto 0); -- export reg_diag_bg_writedata_export : out std_logic_vector(31 downto 0); -- export
reg_dp_block_validate_bsn_at_sync_address_export : out std_logic_vector(3 downto 0); -- export reg_dp_block_validate_bsn_at_sync_address_export : out std_logic_vector(4 downto 0); -- export
reg_dp_block_validate_bsn_at_sync_clk_export : out std_logic; -- export reg_dp_block_validate_bsn_at_sync_clk_export : out std_logic; -- export
reg_dp_block_validate_bsn_at_sync_read_export : out std_logic; -- export reg_dp_block_validate_bsn_at_sync_read_export : out std_logic; -- export
reg_dp_block_validate_bsn_at_sync_readdata_export : in std_logic_vector(31 downto 0) := (others => 'X'); -- export reg_dp_block_validate_bsn_at_sync_readdata_export : in std_logic_vector(31 downto 0) := (others => 'X'); -- export
......
...@@ -357,7 +357,7 @@ PACKAGE sdp_pkg is ...@@ -357,7 +357,7 @@ PACKAGE sdp_pkg is
CONSTANT c_sdp_reg_dp_xonoff_lane_addr_w : NATURAL := ceil_log2(c_sdp_N_ring_lanes_max) + 1; CONSTANT c_sdp_reg_dp_xonoff_lane_addr_w : NATURAL := ceil_log2(c_sdp_N_ring_lanes_max) + 1;
CONSTANT c_sdp_reg_dp_xonoff_local_addr_w : NATURAL := ceil_log2(c_sdp_N_ring_lanes_max) + 1; CONSTANT c_sdp_reg_dp_xonoff_local_addr_w : NATURAL := ceil_log2(c_sdp_N_ring_lanes_max) + 1;
CONSTANT c_sdp_reg_dp_block_validate_err_addr_w : NATURAL := ceil_log2(c_sdp_N_ring_lanes_max) + 4; CONSTANT c_sdp_reg_dp_block_validate_err_addr_w : NATURAL := ceil_log2(c_sdp_N_ring_lanes_max) + 4;
CONSTANT c_sdp_reg_dp_block_validate_bsn_at_sync_addr_w : NATURAL := ceil_log2(c_sdp_N_ring_lanes_max) + 1; CONSTANT c_sdp_reg_dp_block_validate_bsn_at_sync_addr_w : NATURAL := ceil_log2(c_sdp_N_ring_lanes_max) + 2;
CONSTANT c_sdp_reg_ring_info_addr_w : NATURAL := 2; CONSTANT c_sdp_reg_ring_info_addr_w : NATURAL := 2;
CONSTANT c_sdp_reg_tr_10GbE_mac_addr_w : NATURAL := 13; CONSTANT c_sdp_reg_tr_10GbE_mac_addr_w : NATURAL := 13;
CONSTANT c_sdp_reg_tr_10GbE_eth10g_addr_w : NATURAL := 1; CONSTANT c_sdp_reg_tr_10GbE_eth10g_addr_w : NATURAL := 1;
......
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