Fixed modelsim compile errors

applications/lofar2/libraries/sdp/src/vhdl/node_sdp_adc_input_and_timing.vhd

@@ -26,17 +26,14 @@
 --   Contains all the signal processing blocks to receive and time the ADC input data
 --   See https://support.astron.nl/confluence/display/STAT/L5+SDPFW+DD%3A+ADC+data+input+and+timestamp
 
-LIBRARY IEEE, common_lib, unb2b_board_lib, technology_lib, diag_lib, aduh_lib, dp_lib, tech_jesd204b_lib;
+LIBRARY IEEE, common_lib, technology_lib, diag_lib, aduh_lib, dp_lib, tech_jesd204b_lib;
 USE IEEE.STD_LOGIC_1164.ALL;
 USE IEEE.NUMERIC_STD.ALL;
 USE common_lib.common_pkg.ALL;
 USE common_lib.common_mem_pkg.ALL;
 USE technology_lib.technology_pkg.ALL;
-USE unb2b_board_lib.unb2b_board_pkg.ALL;
-USE unb2b_board_lib.unb2b_board_peripherals_pkg.ALL;
 USE diag_lib.diag_pkg.ALL;
 USE dp_lib.dp_stream_pkg.ALL;
-USE work.lofar2_unb2b_adc_pkg.ALL;
 USE work.sdp_pkg.ALL;
 
 ENTITY node_sdp_adc_input_and_timing IS
@@ -126,11 +123,6 @@ ARCHITECTURE str OF node_sdp_adc_input_and_timing IS
   CONSTANT c_bs_nof_block_per_sync  : NATURAL := 390625;  -- generate a sync every 2s for testing
   CONSTANT c_dp_fifo_dc_size        : NATURAL := 64;
  
- 
-  -- QSFP leds
-  SIGNAL qsfp_green_led_arr         : STD_LOGIC_VECTOR(c_unb2b_board_tr_qsfp.nof_bus-1 DOWNTO 0);
-  SIGNAL qsfp_red_led_arr           : STD_LOGIC_VECTOR(c_unb2b_board_tr_qsfp.nof_bus-1 DOWNTO 0);
-
   -- JESD signals
   SIGNAL rx_clk                     : STD_LOGIC; -- formerly jesd204b_frame_clk
   SIGNAL rx_rst                     : STD_LOGIC; 
@@ -411,7 +403,7 @@ BEGIN
 
     reg_mosi       => reg_aduh_monitor_mosi, -- read only access to the signal path data mean sum and power sum registers
     reg_miso       => reg_aduh_monitor_miso,
-    buf_mosi       => c_mm_mosi_rst,         -- Unused
+    buf_mosi       => c_mem_mosi_rst,         -- Unused
     buf_miso       => OPEN,
 
     -- Streaming clock domain

applications/lofar2/libraries/sdp/src/vhdl/sdp_pkg.vhd

@@ -30,6 +30,7 @@
 LIBRARY ieee, common_lib, rTwoSDF_lib, fft_lib, filter_lib, wpfb_lib;
 USE IEEE.std_logic_1164.ALL;
 USE common_lib.common_pkg.ALL;
+USE common_lib.common_mem_pkg.ALL;
 USE common_lib.common_field_pkg.ALL;
 USE rTwoSDF_lib.rTwoSDFPkg.ALL;
 USE fft_lib.fft_pkg.ALL; 
@@ -101,6 +102,8 @@ PACKAGE sdp_pkg is
   CONSTANT c_sdp_V_si_db         : NATURAL := 1024;
   CONSTANT c_sdp_V_si_db_large   : NATURAL := 131072;
 
+  CONSTANT c_sdp_ait_buf_nof_data_bsn : NATURAL := c_sdp_V_si_db; -- Old constant used in filterbank and beamformer
+
   -- 
   CONSTANT c_sdp_marker_sst : NATURAL := 83;  -- = 0x53 = 'S'
   CONSTANT c_sdp_marker_bst : NATURAL := 66;  -- = 0x42 = 'B'
@@ -132,7 +135,7 @@ PACKAGE sdp_pkg is
   CONSTANT c_sdp_jesd204b_freq        : STRING := "200MHz";
   CONSTANT c_sdp_jesd204b_bus_w       : NATURAL := 12;
   CONSTANT c_sdp_jesd204b_nof_bus     : NATURAL := 1;
-  CONSTANT c_sdp_jesd204b_nof_streams : NATURAL := c_sdp_jesd204_bus_w*c_sdp_jesd204b_nof_bus;
+  CONSTANT c_sdp_jesd204b_nof_streams : NATURAL := c_sdp_jesd204b_bus_w*c_sdp_jesd204b_nof_bus;
   CONSTANT c_sdp_jesd204b_nof_sync_n  : NATURAL := c_sdp_jesd204b_bus_w/c_sdp_S_rcu; -- Three ADCs per RCU share a sync 
 
   CONSTANT c_sdp_jesd204b_mm_jesd_ctrl_reg : t_c_mem := (latency  => 1,
@@ -149,9 +152,9 @@ PACKAGE sdp_pkg is
   CONSTANT c_sdp_reg_dp_shiftram_addr_w        : NATURAL := 1 + ceil_log2(c_sdp_S_pn); 
   CONSTANT c_sdp_reg_bsn_source_addr_w         : NATURAL := 2;
   CONSTANT c_sdp_reg_bsn_scheduler_addr_w      : NATURAL := 1;
-  CONSTANT c_sdp_ram_diag_data_buf_jesd_addr_w : NATURAL := ceil_log2(2*c_sdp_ait_buf_nof_data_jesd);
+  CONSTANT c_sdp_ram_diag_data_buf_jesd_addr_w : NATURAL := ceil_log2(c_sdp_S_pn*c_sdp_V_si_db);
   CONSTANT c_sdp_reg_diag_data_buf_jesd_addr_w : NATURAL := 1 + ceil_log2(2);
-  CONSTANT c_sdp_ram_diag_data_buf_bsn_addr_w  : NATURAL := ceil_log2(c_sdp_S_pn*c_sdp_ait_buf_nof_data_bsn);  
+  CONSTANT c_sdp_ram_diag_data_buf_bsn_addr_w  : NATURAL := ceil_log2(c_sdp_S_pn*c_sdp_V_si_db_large);  
   CONSTANT c_sdp_reg_diag_data_buf_bsn_addr_w  : NATURAL := 1 + ceil_log2(c_sdp_S_pn);  
   CONSTANT c_sdp_reg_aduh_monitor_addr_w       : NATURAL := 2 + ceil_log2(c_sdp_S_pn);