implemented the I2C commands for the PMBUS

boards/uniboard2/libraries/unb2_board/src/vhdl/unb2_board_sens_ctrl.vhd

@@ -58,6 +58,13 @@ ARCHITECTURE rtl OF unb2_board_sens_ctrl IS
   CONSTANT ETH_MAX1617_ADR      : NATURAL := MAX1617_ADR_MID_LOW;      -- ETH  temperature sensor, slave address is "0101001"
   CONSTANT HOTSWAP_LTC4260_ADR  : NATURAL := LTC4260_ADR_LOW_LOW_LOW;  -- Hot swap controller,     slave address is "1000100";
 
+  CONSTANT LOC_POWER_TR_R : NATURAL := 16#0E#;
+  CONSTANT LP_VOUT_MODE   : NATURAL := 16#20#;
+  CONSTANT LP_VOUT        : NATURAL := 16#8B#;
+  CONSTANT LP_IOUT        : NATURAL := 16#8C#;
+  CONSTANT LP_TEMP        : NATURAL := 16#8D#;
+
+
   TYPE t_SEQUENCE IS ARRAY (NATURAL RANGE <>) OF NATURAL;
   
   -- The I2C bit rate is c_i2c_bit_rate = 50 [kbps], so 20 us period. Hence 20 us wait time for SDA is enough
@@ -65,10 +72,15 @@ ARCHITECTURE rtl OF unb2_board_sens_ctrl IS
   CONSTANT c_timeout_sda : NATURAL := sel_a_b(g_sim, 0, 16);  -- wait 16 * 256 = 4096 clk periods
   
   CONSTANT c_SEQ : t_SEQUENCE := (
-    SMBUS_READ_BYTE ,    FPGA_MAX1617_ADR, MAX1617_CMD_READ_REMOTE_TEMP,
-    SMBUS_READ_BYTE ,     ETH_MAX1617_ADR, MAX1617_CMD_READ_REMOTE_TEMP,
-    SMBUS_READ_BYTE , HOTSWAP_LTC4260_ADR, LTC4260_CMD_SENSE,
-    SMBUS_READ_BYTE , HOTSWAP_LTC4260_ADR, LTC4260_CMD_SOURCE,
+    SMBUS_READ_BYTE ,    LOC_POWER_TR_R, LP_VOUT_MODE,
+    SMBUS_READ_WORD ,    LOC_POWER_TR_R, LP_VOUT,
+    SMBUS_READ_WORD ,    LOC_POWER_TR_R, LP_IOUT,
+    SMBUS_READ_WORD ,    LOC_POWER_TR_R, LP_TEMP,
+
+    --SMBUS_READ_BYTE ,    FPGA_MAX1617_ADR, MAX1617_CMD_READ_REMOTE_TEMP,
+    --SMBUS_READ_BYTE ,     ETH_MAX1617_ADR, MAX1617_CMD_READ_REMOTE_TEMP,
+    --SMBUS_READ_BYTE , HOTSWAP_LTC4260_ADR, LTC4260_CMD_SENSE,
+    --SMBUS_READ_BYTE , HOTSWAP_LTC4260_ADR, LTC4260_CMD_SOURCE,
     SMBUS_C_SAMPLE_SDA, 0, c_timeout_sda, 0, 0,
     SMBUS_C_END,
     SMBUS_C_NOP