Skip to content
Snippets Groups Projects
Commit 8a8b6f6d authored by Kenneth Hiemstra's avatar Kenneth Hiemstra
Browse files

For SOPC -> QSYS conversion. The clock 'the_altpll_0' in SOPC, is called

'altpll_0' for QSYS.
parent cc6d6b4f
Branches
No related tags found
No related merge requests found
......@@ -38,10 +38,16 @@ set_clock_groups -asynchronous -group [get_clocks altera_reserved_tck]
set_clock_groups -asynchronous -group [get_clocks SB_CLK]
set_clock_groups -asynchronous -group [get_clocks SA_CLK]
set_clock_groups -asynchronous -group [get_clocks ETH_CLK]
set_clock_groups -asynchronous -group [get_clocks *u_sopc|the_altpll_0|sd1|pll7|clk[0]]
set_clock_groups -asynchronous -group [get_clocks *u_sopc|the_altpll_0|sd1|pll7|clk[1]]
set_clock_groups -asynchronous -group [get_clocks *u_sopc|the_altpll_0|sd1|pll7|clk[2]]
set_clock_groups -asynchronous -group [get_clocks *u_sopc|the_altpll_0|sd1|pll7|clk[3]]
set_clock_groups -asynchronous -group [get_clocks *u_sopc|altpll_0|sd1|pll7|clk[0]]
set_clock_groups -asynchronous -group [get_clocks *u_sopc|altpll_0|sd1|pll7|clk[1]]
set_clock_groups -asynchronous -group [get_clocks *u_sopc|altpll_0|sd1|pll7|clk[2]]
set_clock_groups -asynchronous -group [get_clocks *u_sopc|altpll_0|sd1|pll7|clk[3]]
set_clock_groups -asynchronous -group [get_clocks CLK]
set_clock_groups -asynchronous -group [get_clocks {*|altpll_component|auto_generated|pll1|clk[0]}]
set_clock_groups -asynchronous -group [get_clocks ADC_BI_A_CLK]
......
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Please register or to comment