Skip to content
Snippets Groups Projects
Commit 88dda588 authored by David Brouwer's avatar David Brouwer
Browse files

RTSD-247: Fix typo.

parent 947a00e7
No related branches found
No related tags found
1 merge request!372RTSD-247: Create Reset Release IPs for iwave Intel Agilex 7 needed to be used for BSP
Pipeline #68552 passed
Stage: linting
Hide whitespace changes
Inline Side-by-side
libraries/technology/ip_agi027_xxxx/reset_release/README.txt
+ 1
− 1
View file @ 88dda588
...@@ -100,7 +100,7 @@ b) Reset output port can be a Reset Interface (ri) or Conduit Interface (ci): ...@@ -100,7 +100,7 @@ b) Reset output port can be a Reset Interface (ri) or Conduit Interface (ci):
. ri = reset interface, is the selected type of reset output port . ri = reset interface, is the selected type of reset output port
Desc. : allow reset connection in Platform Designer Desc. : allow reset connection in Platform Designer
. The ci IP is ued in the vendor FPGA Design Example. . The ci IP is used in the vendor FPGA Design Example.
c) Choose between using or not using a separate library in altera_libraries: c) Choose between using or not using a separate library in altera_libraries:
......
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment