Support g_use_complex.

libraries/base/dp/src/vhdl/dp_reverse_n_data.vhd

@@ -51,7 +51,8 @@ ENTITY dp_reverse_n_data IS
     g_pipeline_mux_in    : NATURAL := 0;  -- parallel to serial section
     g_pipeline_mux_out   : NATURAL := 1;
     g_reverse_len        : NATURAL := 2;
-    g_data_w             : NATURAL := 16;
+    g_data_w             : NATURAL := 16;  -- should be 2 times the c_complex_w if g_use_complex = TRUE
+    g_use_complex        : BOOLEAN := FALSE;
     g_signed             : BOOLEAN := TRUE
   );
   PORT (
@@ -69,6 +70,7 @@ ARCHITECTURE str OF dp_reverse_n_data IS
   CONSTANT c_pipeline_total : NATURAL := g_pipeline_demux_in + g_pipeline_demux_out +
                                          g_reverse_len-1 +
                                          g_pipeline_mux_in + g_pipeline_mux_out;
+  CONSTANT c_complex_w      : NATURAL := g_data_w / 2;
 
   SIGNAL in_data            : STD_LOGIC_VECTOR(g_data_w-1 DOWNTO 0);
 
@@ -79,7 +81,14 @@ ARCHITECTURE str OF dp_reverse_n_data IS
 
 BEGIN
 
-  in_data <= snk_in.data(g_data_w-1 DOWNTO 0);
+  p_in_data : PROCESS(snk_in)
+  BEGIN
+    IF g_use_complex = FALSE THEN
+      in_data <= snk_in.data(g_data_w-1 DOWNTO 0);
+    ELSE
+      in_data <= snk_in.im(c_complex_w-1 DOWNTO 0) & snk_in.re(c_complex_w-1 DOWNTO 0);
+    END IF;
+  END PROCESS;
 
   u_common_reverse_n : ENTITY common_lib.common_reverse_n_data
   GENERIC MAP (
@@ -119,10 +128,15 @@ BEGIN
   p_src_out : PROCESS(snk_in_delayed, reversed_data)
   BEGIN
     src_out <= snk_in_delayed;
-    IF g_signed = TRUE THEN
-      src_out.data <= RESIZE_DP_SDATA(reversed_data);
+    IF g_use_complex = FALSE THEN
+      IF g_signed = TRUE THEN
+        src_out.data <= RESIZE_DP_SDATA(reversed_data);
+      ELSE
+        src_out.data <= RESIZE_DP_DATA(reversed_data);
+      END IF;
     ELSE
-      src_out.data <= RESIZE_DP_DATA(reversed_data);
+      src_out.im <= RESIZE_DP_DSP_DATA(reversed_data(g_data_w-1 DOWNTO c_complex_w));
+      src_out.re <= RESIZE_DP_DSP_DATA(reversed_data(c_complex_w-1 DOWNTO 0));
     END IF;
   END PROCESS;