Remove some spaces.

libraries/base/reorder/src/vhdl/reorder_row_select.vhd

@@ -54,8 +54,8 @@ entity reorder_row_select is
     dp_clk              : in  std_logic;
 
     -- Streaming
-    input_sosi_arr      : in  t_dp_sosi_arr(g_nof_inputs - 1  downto 0);
-    output_sosi_arr     : out t_dp_sosi_arr(g_nof_outputs - 1  downto 0);
+    input_sosi_arr      : in  t_dp_sosi_arr(g_nof_inputs - 1 downto 0);
+    output_sosi_arr     : out t_dp_sosi_arr(g_nof_outputs - 1 downto 0);
     in_select           : in  std_logic_vector(g_nof_outputs * ceil_log2(g_nof_inputs) - 1 downto 0)
   );
 end reorder_row_select;
@@ -69,13 +69,13 @@ architecture str of reorder_row_select is
 
   type reg_type is record
     pipe_sosi_2arr  : t_dp_sosi_2arr(c_tot_pipeline-1 downto 0);
-    output_sosi_arr : t_dp_sosi_arr(g_nof_outputs - 1   downto 0);
+    output_sosi_arr : t_dp_sosi_arr(g_nof_outputs - 1 downto 0);
   end record;
 
   signal r, rin             : reg_type;
 
-  signal reorder_in_dat     : std_logic_vector(g_nof_inputs * c_data_w - 1    downto 0);
-  signal reorder_out_dat    : std_logic_vector(g_nof_outputs * c_data_w - 1   downto 0);
+  signal reorder_in_dat     : std_logic_vector(g_nof_inputs * c_data_w - 1 downto 0);
+  signal reorder_out_dat    : std_logic_vector(g_nof_outputs * c_data_w - 1 downto 0);
 
 begin