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HDL
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RTSD
HDL
Commits
7705d809
Commit
7705d809
authored
8 years ago
by
Eric Kooistra
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Default use RTL g_variant for common_mult.
parent
eead8435
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libraries/io/aduh/src/vhdl/aduh_power_sum.vhd
+7
-2
7 additions, 2 deletions
libraries/io/aduh/src/vhdl/aduh_power_sum.vhd
with
7 additions
and
2 deletions
libraries/io/aduh/src/vhdl/aduh_power_sum.vhd
+
7
−
2
View file @
7705d809
...
@@ -19,13 +19,16 @@
...
@@ -19,13 +19,16 @@
--
--
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
LIBRARY
IEEE
,
common_lib
,
common_mult_lib
;
LIBRARY
IEEE
,
technology_lib
,
common_lib
,
common_mult_lib
;
USE
IEEE
.
STD_LOGIC_1164
.
ALL
;
USE
IEEE
.
STD_LOGIC_1164
.
ALL
;
USE
technology_lib
.
technology_select_pkg
.
ALL
;
USE
common_lib
.
common_pkg
.
ALL
;
USE
common_lib
.
common_pkg
.
ALL
;
ENTITY
aduh_power_sum
IS
ENTITY
aduh_power_sum
IS
GENERIC
(
GENERIC
(
g_technology
:
NATURAL
:
=
c_tech_select_default
;
g_variant
:
STRING
:
=
"RTL"
;
g_symbol_w
:
NATURAL
:
=
12
;
g_symbol_w
:
NATURAL
:
=
12
;
g_nof_symbols_per_data
:
NATURAL
:
=
4
;
-- big endian in_data, t0 in MSSymbol, so [h:0] = [t0]&[t1]&[t2]&[t3]
g_nof_symbols_per_data
:
NATURAL
:
=
4
;
-- big endian in_data, t0 in MSSymbol, so [h:0] = [t0]&[t1]&[t2]&[t3]
g_nof_accumulations
:
NATURAL
:
=
800
*
10
**
6
;
-- integration time in symbols
g_nof_accumulations
:
NATURAL
:
=
800
*
10
**
6
;
-- integration time in symbols
...
@@ -67,8 +70,10 @@ ARCHITECTURE str OF aduh_power_sum IS
...
@@ -67,8 +70,10 @@ ARCHITECTURE str OF aduh_power_sum IS
BEGIN
BEGIN
u_prod_data
:
ENTITY
common_mult_lib
.
common_mult
(
rtl
)
u_prod_data
:
ENTITY
common_mult_lib
.
common_mult
GENERIC
MAP
(
GENERIC
MAP
(
g_technology
=>
g_technology
,
g_variant
=>
g_variant
,
g_in_a_w
=>
g_symbol_w
,
g_in_a_w
=>
g_symbol_w
,
g_in_b_w
=>
g_symbol_w
,
g_in_b_w
=>
g_symbol_w
,
g_out_p_w
=>
c_prod_w
,
-- <= g_in_a_w + g_in_b_w
g_out_p_w
=>
c_prod_w
,
-- <= g_in_a_w + g_in_b_w
...
...
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