Updated lofar2_unb2b_ring design for synthesis, also created

lofar2_unb2c_ring.

applications/lofar2/designs/lofar2_unb2b_ring/hdllib.cfg

@@ -7,8 +7,10 @@ hdl_lib_include_ip =
                      ip_arria10_e1sg_mac_10g
                      ip_arria10_e1sg_pll_xgmii_mac_clocks
                      ip_arria10_e1sg_transceiver_pll_10g
-                     ip_arria10_e1sg_phy_10gbase_r
-                     ip_arria10_e1sg_transceiver_reset_controller_1
+                     ip_arria10_e1sg_phy_10gbase_r                    # for lofar2_unb2b_ring_one revision
+                     ip_arria10_e1sg_phy_10gbase_r_12                 # for lofar2_unb2b_ring_full revision
+                     ip_arria10_e1sg_transceiver_reset_controller_1   # for lofar2_unb2b_ring_one revision
+                     ip_arria10_e1sg_transceiver_reset_controller_12  # for lofar2_unb2b_ring_full revision
 
 synth_files =
     src/vhdl/qsys_lofar2_unb2b_ring_pkg.vhd

applications/lofar2/designs/lofar2_unb2b_ring/lofar2_unb2b_ring.fpga.yaml

@@ -5,6 +5,12 @@ schema_type: fpga
 hdl_library_name: lofar2_unb2b_ring
 fpga_name: lofar2_unb2b_ring
 fpga_description: "FPGA design lofar2_unb2b_ring"
+parameters:
+  - { name: c_nof_lanes,            value: 8 }
+  - { name: c_nof_rx_monitors,      value: 16 }
+  - { name: c_nof_tx_monitors,      value: 16 }
+  - { name: c_nof_err_counts,       value: 8 }
+  - { name: c_nof_mac,              value: 12 }
 
 peripherals:
   #############################################################################
@@ -57,4 +63,78 @@ peripherals:
     mm_port_names:
       - REG_REMU
  
+  #############################################################################
+  # Ring
+  #############################################################################
+  
+  - peripheral_name: dp/dp_bsn_monitor_v2
+    peripheral_group: ring_rx
+    number_of_peripherals: c_nof_lanes
+    parameter_overrides:
+      - { name: g_nof_streams, value: c_nof_rx_monitors }
+    mm_port_names:
+      - REG_BSN_MONITOR_V2_RING_RX
+
+  - peripheral_name: dp/dp_bsn_monitor_v2
+    peripheral_group: ring_tx
+    number_of_peripherals: c_nof_lanes
+    parameter_overrides:
+      - { name: g_nof_streams, value: c_nof_tx_monitors }
+    mm_port_names:
+      - REG_BSN_MONITOR_V2_RING_TX
+
+  - peripheral_name: ring/ring_lane_info
+    number_of_peripherals: c_nof_lanes
+    mm_port_names:
+      - REG_RING_LANE_INFO
+
+  - peripheral_name: dp/dp_xonoff
+    peripheral_group: lane
+    number_of_peripherals: c_nof_lanes
+    mm_port_names:
+      - REG_DP_XONOFF_LANE
+
+  - peripheral_name: dp/dp_xonoff
+    peripheral_group: local
+    number_of_peripherals: c_nof_lanes
+    mm_port_names:
+      - REG_DP_XONOFF_LOCAL
+
+  - peripheral_name: dp/dp_block_validate_err
+    number_of_peripherals: c_nof_lanes
+    parameter_overrides:
+      - { name: g_nof_err_counts, value: c_nof_err_counts }
+    mm_port_names:
+      - REG_DP_BLOCK_VALIDATE_ERR
+
+  - peripheral_name: dp/dp_block_validate_bsn_at_sync
+    number_of_peripherals: c_nof_lanes
+    mm_port_names:
+      - REG_DP_BLOCK_VALIDATE_BSN_AT_SYNC
+
+  - peripheral_name: ring/ring_info
+    mm_port_names:
+      - REG_RING_INFO
+
+  - peripheral_name: tr_10GbE/tr_10GbE_unb2legacy
+    parameter_overrides:
+      - { name: g_nof_macs, value: c_nof_mac }
+    mm_port_names:
+      - REG_TR_10GBE_MAC
+
+  - peripheral_name: tr_10GbE/tr_10GbE_eth10g
+    parameter_overrides:
+      - { name: g_nof_macs, value: c_nof_mac }
+    mm_port_names:
+      - REG_TR_10GBE_ETH10G
+
+  - peripheral_name: diag/diag_block_gen
+    parameter_overrides:
+      - { name: g_nof_streams, value:  1}
+      - { name: g_buf_dat_w,   value: 32}
+      - { name: g_buf_addr_w,  value:  7}
+    mm_port_names:
+      - REG_DIAG_BG
+      - RAM_DIAG_BG
+
 

applications/lofar2/designs/lofar2_unb2b_ring/revisions/lofar2_unb2b_ring_full/hdllib.cfg

@@ -72,5 +72,7 @@ quartus_ip_files =
     $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_ring/ip/qsys_lofar2_unb2b_ring/qsys_lofar2_unb2b_ring_reg_unb_pmbus.ip
     $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_ring/ip/qsys_lofar2_unb2b_ring/qsys_lofar2_unb2b_ring_reg_unb_sens.ip
     $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_ring/ip/qsys_lofar2_unb2b_ring/qsys_lofar2_unb2b_ring_reg_wdi.ip
+    $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_ring/ip/qsys_lofar2_unb2b_ring/qsys_lofar2_unb2b_ring_rom_system_info.ip
+    $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_ring/ip/qsys_lofar2_unb2b_ring/qsys_lofar2_unb2b_ring_timer_0.ip
 
 nios2_app_userflags = -DCOMPILE_FOR_GEN2_UNB2

applications/lofar2/designs/lofar2_unb2b_ring/revisions/lofar2_unb2b_ring_one/hdllib.cfg

@@ -72,5 +72,7 @@ quartus_ip_files =
     $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_ring/ip/qsys_lofar2_unb2b_ring/qsys_lofar2_unb2b_ring_reg_unb_pmbus.ip
     $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_ring/ip/qsys_lofar2_unb2b_ring/qsys_lofar2_unb2b_ring_reg_unb_sens.ip
     $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_ring/ip/qsys_lofar2_unb2b_ring/qsys_lofar2_unb2b_ring_reg_wdi.ip
+    $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_ring/ip/qsys_lofar2_unb2b_ring/qsys_lofar2_unb2b_ring_rom_system_info.ip
+    $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_ring/ip/qsys_lofar2_unb2b_ring/qsys_lofar2_unb2b_ring_timer_0.ip
 
 nios2_app_userflags = -DCOMPILE_FOR_GEN2_UNB2

applications/lofar2/designs/lofar2_unb2c_ring/hdllib.cfg

+hdl_lib_name = lofar2_unb2c_ring
+hdl_library_clause_name = lofar2_unb2c_ring_lib
+hdl_lib_uses_synth = common technology mm unb2c_board dp eth tech_tse tech_pll tr_10GbE diagnostics diag aduh wpfb tech_jesd204b lofar2_sdp ring
+hdl_lib_uses_sim =  
+hdl_lib_technology = ip_arria10_e2sg
+hdl_lib_include_ip = 
+                     ip_arria10_e2sg_mac_10g
+                     ip_arria10_e2sg_pll_xgmii_mac_clocks
+                     ip_arria10_e2sg_transceiver_pll_10g
+                     ip_arria10_e2sg_phy_10gbase_r                    # for lofar2_unb2c_ring_one revision
+                     ip_arria10_e2sg_phy_10gbase_r_12                 # for lofar2_unb2c_ring_full revision
+                     ip_arria10_e2sg_transceiver_reset_controller_1   # for lofar2_unb2c_ring_one revision
+                     ip_arria10_e2sg_transceiver_reset_controller_12  # for lofar2_unb2c_ring_full revision
+
+synth_files =
+    src/vhdl/qsys_lofar2_unb2c_ring_pkg.vhd
+    src/vhdl/lofar2_unb2c_ring_pkg.vhd
+    src/vhdl/mmc_lofar2_unb2c_ring.vhd
+    src/vhdl/lofar2_unb2c_ring.vhd
+    
+test_bench_files = 
+    tb/vhdl/tb_lofar2_unb2c_ring.vhd
+    tb/vhdl/tb_tb_lofar2_unb2c_ring.vhd
+
+regression_test_vhdl =
+    tb/vhdl/tb_tb_lofar2_unb2c_ring.vhd
+
+[modelsim_project_file]
+modelsim_copy_files =
+
+[quartus_project_file]
+quartus_copy_files =
+    quartus .
+

applications/lofar2/designs/lofar2_unb2c_ring/lofar2_unb2c_ring.fpga.yaml

+schema_name: args
+schema_version: 1.0
+schema_type: fpga
+
+hdl_library_name: lofar2_unb2c_ring
+fpga_name: lofar2_unb2c_ring
+fpga_description: "FPGA design lofar2_unb2c_ring"
+parameters:
+  - { name: c_nof_lanes,            value: 8 }
+  - { name: c_nof_rx_monitors,      value: 16 }
+  - { name: c_nof_tx_monitors,      value: 16 }
+  - { name: c_nof_err_counts,       value: 8 }
+  - { name: c_nof_mac,              value: 12 }
+
+peripherals:
+  #############################################################################
+  # Factory / minimal (see ctrl_unb2c_board.vhd)
+  #############################################################################
+  - peripheral_name: unb2c_board/system_info
+    lock_base_address: 0x10000
+    mm_port_names:
+      - ROM_SYSTEM_INFO
+      - PIO_SYSTEM_INFO
+
+  - peripheral_name: unb2c_board/wdi
+    mm_port_names:
+      - REG_WDI
+
+  - peripheral_name: unb2c_board/unb2_fpga_sens
+    mm_port_names:
+      - REG_FPGA_TEMP_SENS
+      - REG_FPGA_VOLTAGE_SENS
+    
+  - peripheral_name: unb2c_board/ram_scrap
+    mm_port_names:
+      - RAM_SCRAP
+      
+  - peripheral_name: eth/eth
+    mm_port_names:
+      - AVS_ETH_0_TSE
+      - AVS_ETH_0_REG
+      - AVS_ETH_0_RAM
+      
+  - peripheral_name: ppsh/ppsh
+    mm_port_names:
+      - PIO_PPS
+      
+  - peripheral_name: epcs/epcs
+    mm_port_names:
+      - REG_EPCS
+      
+  - peripheral_name: dp/dpmm
+    mm_port_names:
+      - REG_DPMM_CTRL
+      - REG_DPMM_DATA
+      
+  - peripheral_name: dp/mmdp
+    mm_port_names:
+      - REG_MMDP_CTRL
+      - REG_MMDP_DATA
+      
+  - peripheral_name: remu/remu
+    mm_port_names:
+      - REG_REMU
+ 
+  #############################################################################
+  # Ring
+  #############################################################################
+  
+  - peripheral_name: dp/dp_bsn_monitor_v2
+    peripheral_group: ring_rx
+    number_of_peripherals: c_nof_lanes
+    parameter_overrides:
+      - { name: g_nof_streams, value: c_nof_rx_monitors }
+    mm_port_names:
+      - REG_BSN_MONITOR_V2_RING_RX
+
+  - peripheral_name: dp/dp_bsn_monitor_v2
+    peripheral_group: ring_tx
+    number_of_peripherals: c_nof_lanes
+    parameter_overrides:
+      - { name: g_nof_streams, value: c_nof_tx_monitors }
+    mm_port_names:
+      - REG_BSN_MONITOR_V2_RING_TX
+
+  - peripheral_name: ring/ring_lane_info
+    number_of_peripherals: c_nof_lanes
+    mm_port_names:
+      - REG_RING_LANE_INFO
+
+  - peripheral_name: dp/dp_xonoff
+    peripheral_group: lane
+    number_of_peripherals: c_nof_lanes
+    mm_port_names:
+      - REG_DP_XONOFF_LANE
+
+  - peripheral_name: dp/dp_xonoff
+    peripheral_group: local
+    number_of_peripherals: c_nof_lanes
+    mm_port_names:
+      - REG_DP_XONOFF_LOCAL
+
+  - peripheral_name: dp/dp_block_validate_err
+    number_of_peripherals: c_nof_lanes
+    parameter_overrides:
+      - { name: g_nof_err_counts, value: c_nof_err_counts }
+    mm_port_names:
+      - REG_DP_BLOCK_VALIDATE_ERR
+
+  - peripheral_name: dp/dp_block_validate_bsn_at_sync
+    number_of_peripherals: c_nof_lanes
+    mm_port_names:
+      - REG_DP_BLOCK_VALIDATE_BSN_AT_SYNC
+
+  - peripheral_name: ring/ring_info
+    mm_port_names:
+      - REG_RING_INFO
+
+  - peripheral_name: tr_10GbE/tr_10GbE_unb2legacy
+    parameter_overrides:
+      - { name: g_nof_macs, value: c_nof_mac }
+    mm_port_names:
+      - REG_TR_10GBE_MAC
+
+  - peripheral_name: tr_10GbE/tr_10GbE_eth10g
+    parameter_overrides:
+      - { name: g_nof_macs, value: c_nof_mac }
+    mm_port_names:
+      - REG_TR_10GBE_ETH10G
+
+  - peripheral_name: diag/diag_block_gen
+    parameter_overrides:
+      - { name: g_nof_streams, value:  1}
+      - { name: g_buf_dat_w,   value: 32}
+      - { name: g_buf_addr_w,  value:  7}
+    mm_port_names:
+      - REG_DIAG_BG
+      - RAM_DIAG_BG
+
+