Merge branch 'master' into L2SDP-211

applications/ta2/ip/ta2_unb2b_jesd204b/ta2_unb2b_jesd204b.vhd

@@ -100,10 +100,13 @@ ARCHITECTURE str OF ta2_unb2b_jesd204b IS
 
   SIGNAL i_jesd204b_sync_n_arr             : STD_LOGIC_VECTOR(c_nof_streams_jesd204b-1 DOWNTO 0);
   SIGNAL jesd204b_serial_rx_arr            : STD_LOGIC_VECTOR(c_nof_streams_jesd204b-1 DOWNTO 0) := (OTHERS => '0');
+  SIGNAL jesd204b_disable_arr              : STD_LOGIC_VECTOR(c_nof_streams_jesd204b-1 DOWNTO 0);
+
 BEGIN
 
   jesd204b_sync_n_arr <= i_jesd204b_sync_n_arr(g_nof_streams -1 DOWNTO 0);
   jesd204b_serial_rx_arr(g_nof_streams -1 DOWNTO 0) <= serial_rx_arr;
+  jesd204b_disable_arr <= (OTHERS => '0');
 
   u_jesd204b: ENTITY tech_jesd204b_lib.tech_jesd204b 
   GENERIC MAP(
@@ -115,6 +118,8 @@ BEGIN
     jesd204b_sysref      => jesd204b_sysref,   
     jesd204b_sync_n_arr  => i_jesd204b_sync_n_arr,   
   
+    jesd204b_disable_arr => jesd204b_disable_arr,
+
     rx_sosi_arr          => jesd204b_rx_sosi_arr,          
     rx_clk               => jesd204b_rx_clk,
     rx_rst               => jesd204b_rx_rst,         

libraries/technology/ip_arria10_e1sg/jesd204b/compile_ip.tcl

@@ -29,11 +29,11 @@
 #vlib ./work/         ;# Assume library work already exist                                                                                        
 
 
-set IP_DIR   "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e1sg_jesd204b_rx/sim"
-  vcom         "$IP_DIR/ip_arria10_e1sg_jesd204b_rx.vhd"                            
+set IP_DIR   "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e1sg_jesd204b_rx_200MHz/sim"
+  vcom         "$IP_DIR/ip_arria10_e1sg_jesd204b_rx_200MHz.vhd"                            
 
-set IP_DIR   "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e1sg_jesd204b_rx_core_pll/sim"
-  vcom         "$IP_DIR/ip_arria10_e1sg_jesd204b_rx_core_pll.vhd"                            
+set IP_DIR   "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e1sg_jesd204b_rx_core_pll_200MHz/sim"
+  vcom         "$IP_DIR/ip_arria10_e1sg_jesd204b_rx_core_pll_200MHz.vhd"                            
 
 set IP_DIR   "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e1sg_jesd204b_rx_reset_seq/sim"
   vcom         "$IP_DIR/ip_arria10_e1sg_jesd204b_rx_reset_seq.vhd"                            

libraries/technology/ip_arria10_e1sg/jesd204b/hdllib.cfg

@@ -26,10 +26,10 @@ quartus_qip_files =
 
 [generate_ip_libs]
 qsys-generate_ip_files = 
-    ip_arria10_e1sg_jesd204b_rx_200MHz.ip
-    ip_arria10_e1sg_jesd204b_rx_core_pll_200MHz.ip
-    ip_arria10_e1sg_jesd204b_rx_reset_seq.ip
-    ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.ip
-    ip_arria10_e1sg_jesd204b_tx.ip
+    ip_arria10_e1sg_jesd204b_rx_200MHz.qsys
+    ip_arria10_e1sg_jesd204b_rx_core_pll_200MHz.qsys
+    ip_arria10_e1sg_jesd204b_rx_reset_seq.qsys
+    ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.qsys
+    ip_arria10_e1sg_jesd204b_tx.qsys