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Commit 73b1b68a authored by Eric Kooistra's avatar Eric Kooistra
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Renamed radix char into char8.

parent 8d18435f
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2 merge requests!100Removed text for XSub that is now written in Confluence Subband correlator...,!76Resolve L2SDP-248
...@@ -6,9 +6,9 @@ number_of_columns = 11 ...@@ -6,9 +6,9 @@ number_of_columns = 11
# col 4: mm_port_type, if - then it is part of previous MM port. # col 4: mm_port_type, if - then it is part of previous MM port.
# col 5: field_name # col 5: field_name
# col 6: field start address (in MM words) # col 6: field start address (in MM words)
# col 7: number of fields # col 7: number of fields, if - then it is part of previous field_name.
# col 8: field access_mode # col 8: field access_mode, if - then it is part of previous field_name.
# col 9: field radix # col 9: field radix, if - then it is part of previous field_name.
# col 10: field mm_mask # col 10: field mm_mask
# col 11: field user_mask, if - then it is same as mm_mask # col 11: field user_mask, if - then it is same as mm_mask
# #
...@@ -24,11 +24,11 @@ number_of_columns = 11 ...@@ -24,11 +24,11 @@ number_of_columns = 11
- - - - info_rom_version 0x00008000 1 RO uint32 b[26:24] - - - - - info_rom_version 0x00008000 1 RO uint32 b[26:24] -
- - - - info_technology 0x00008000 1 RO uint32 b[31:27] - - - - - info_technology 0x00008000 1 RO uint32 b[31:27] -
- - - - use_phy 0x00008001 1 RO uint32 b[7:0] - - - - - use_phy 0x00008001 1 RO uint32 b[7:0] -
- - - - design_name 0x00008002 52 RO char b[31:0] b[7:0] - - - - design_name 0x00008002 52 RO char8 b[31:0] b[7:0]
- - - - stamp_date 0x0000800f 1 RO uint32 b[31:0] - - - - - stamp_date 0x0000800f 1 RO uint32 b[31:0] -
- - - - stamp_time 0x00008010 1 RO uint32 b[31:0] - - - - - stamp_time 0x00008010 1 RO uint32 b[31:0] -
- - - - stamp_commit 0x00008011 3 RO uint32 b[31:0] - - - - - stamp_commit 0x00008011 3 RO uint32 b[31:0] -
- - - - design_note 0x00008014 52 RO char b[31:0] b[7:0] - - - - design_note 0x00008014 52 RO char8 b[31:0] b[7:0]
PIO_WDI 1 1 REG wdi_override 0x0000a000 1 WO uint32 b[31:0] - PIO_WDI 1 1 REG wdi_override 0x0000a000 1 WO uint32 b[31:0] -
REG_FPGA_TEMP_SENS 1 1 REG temp 0x0000c000 1 RO uint32 b[31:0] - REG_FPGA_TEMP_SENS 1 1 REG temp 0x0000c000 1 RO uint32 b[31:0] -
REG_FPGA_VOLTAGE_SENS 1 1 REG voltages 0x0000c000 6 RO uint32 b[31:0] - REG_FPGA_VOLTAGE_SENS 1 1 REG voltages 0x0000c000 6 RO uint32 b[31:0] -
......
...@@ -34,7 +34,7 @@ peripherals: ...@@ -34,7 +34,7 @@ peripherals:
field_description: "FPGA info memory map data" field_description: "FPGA info memory map data"
mm_width: 32 mm_width: 32
user_width: 8 user_width: 8
radix: char radix: char8
access_mode: RO access_mode: RO
address_offset: 0x0 address_offset: 0x0
number_of_fields: 32768 # c_rom_addr_w in mms_unb2b_board_system_info number_of_fields: 32768 # c_rom_addr_w in mms_unb2b_board_system_info
...@@ -110,7 +110,7 @@ peripherals: ...@@ -110,7 +110,7 @@ peripherals:
field_description: "FPGA FW design name string." field_description: "FPGA FW design name string."
mm_width: 32 mm_width: 32
user_width: 8 user_width: 8
radix: char radix: char8
access_mode: RO access_mode: RO
address_offset: 0x8 address_offset: 0x8
number_of_fields: 52 number_of_fields: 52
...@@ -133,7 +133,7 @@ peripherals: ...@@ -133,7 +133,7 @@ peripherals:
field_description: "FPGA FW design note string." field_description: "FPGA FW design note string."
mm_width: 32 mm_width: 32
user_width: 8 user_width: 8
radix: char radix: char8
access_mode: RO access_mode: RO
address_offset: 0x50 address_offset: 0x50
number_of_fields: 52 number_of_fields: 52
......
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