Removed Serial Interface signals

applications/apertif/designs/apertif_unb1_correlator/revisions/apertif_unb1_correlator_mesh_ref/apertif_unb1_correlator_mesh_ref.vhd

@@ -62,7 +62,6 @@ ENTITY apertif_unb1_correlator_mesh_ref IS
     ETH_SGOUT     : OUT   STD_LOGIC;
 
     -- Transceiver clocks
-    SA_CLK        : IN  STD_LOGIC; -- SerDes Clock BN-BI / SI_FN
     SB_CLK        : IN  STD_LOGIC; -- SerDes clock FN-BN (tr_mesh)
 
     -- Mesh Serial I/O
@@ -73,24 +72,7 @@ ENTITY apertif_unb1_correlator_mesh_ref IS
     FN_BN_2_TX    : OUT STD_LOGIC_VECTOR(c_unb1_board_tr_mesh.bus_w-1 DOWNTO 0);
     FN_BN_2_RX    : IN  STD_LOGIC_VECTOR(c_unb1_board_tr_mesh.bus_w-1 DOWNTO 0);
     FN_BN_3_TX    : OUT STD_LOGIC_VECTOR(c_unb1_board_tr_mesh.bus_w-1 DOWNTO 0);
-    FN_BN_3_RX    : IN  STD_LOGIC_VECTOR(c_unb1_board_tr_mesh.bus_w-1 DOWNTO 0);
-
-    -- Serial I/O: 10GbE receivers 
-    SI_FN_0_TX    : OUT   STD_LOGIC_VECTOR(c_unb1_board_ci.tr.bus_w-1 DOWNTO 0);
-    SI_FN_0_RX    : IN    STD_LOGIC_VECTOR(c_unb1_board_ci.tr.bus_w-1 DOWNTO 0);
-    SI_FN_1_TX    : OUT   STD_LOGIC_VECTOR(c_unb1_board_ci.tr.bus_w-1 DOWNTO 0);
-    SI_FN_1_RX    : IN    STD_LOGIC_VECTOR(c_unb1_board_ci.tr.bus_w-1 DOWNTO 0);
-    SI_FN_2_TX    : OUT   STD_LOGIC_VECTOR(c_unb1_board_ci.tr.bus_w-1 DOWNTO 0);
-    SI_FN_2_RX    : IN    STD_LOGIC_VECTOR(c_unb1_board_ci.tr.bus_w-1 DOWNTO 0);
-    SI_FN_3_TX    : OUT   STD_LOGIC_VECTOR(c_unb1_board_ci.tr.bus_w-1 DOWNTO 0);
-    SI_FN_3_RX    : IN    STD_LOGIC_VECTOR(c_unb1_board_ci.tr.bus_w-1 DOWNTO 0);
-
-    SI_FN_0_CNTRL : INOUT STD_LOGIC_VECTOR(c_unb1_board_ci.tr.cntrl_w-1 DOWNTO 0);
-    SI_FN_1_CNTRL : INOUT STD_LOGIC_VECTOR(c_unb1_board_ci.tr.cntrl_w-1 DOWNTO 0);
-    SI_FN_2_CNTRL : INOUT STD_LOGIC_VECTOR(c_unb1_board_ci.tr.cntrl_w-1 DOWNTO 0);
-    SI_FN_3_CNTRL : INOUT STD_LOGIC_VECTOR(c_unb1_board_ci.tr.cntrl_w-1 DOWNTO 0);
-    SI_FN_RSTN    : OUT   STD_LOGIC := '1' -- ResetN is pulled up in the Vitesse chip, but pulled down again by external 1k resistor.
-                                           -- So we need to assign a '1' to it.
+    FN_BN_3_RX    : IN  STD_LOGIC_VECTOR(c_unb1_board_tr_mesh.bus_w-1 DOWNTO 0)
   );
 END apertif_unb1_correlator_mesh_ref;
 
@@ -131,7 +113,7 @@ BEGIN
     ETH_SGIN      => ETH_SGIN,      
     ETH_SGOUT     => ETH_SGOUT,     
                                    
-    SA_CLK        => SA_CLK,        
+    SA_CLK        => '0',        
     SB_CLK        => SB_CLK,        
                                    
     FN_BN_0_TX    => FN_BN_0_TX,    
@@ -143,20 +125,20 @@ BEGIN
     FN_BN_3_TX    => FN_BN_3_TX,    
     FN_BN_3_RX    => FN_BN_3_RX,    
                                    
-    SI_FN_0_TX    => SI_FN_0_TX,    
-    SI_FN_0_RX    => SI_FN_0_RX,    
-    SI_FN_1_TX    => SI_FN_1_TX,    
-    SI_FN_1_RX    => SI_FN_1_RX,    
-    SI_FN_2_TX    => SI_FN_2_TX,    
-    SI_FN_2_RX    => SI_FN_2_RX,    
-    SI_FN_3_TX    => SI_FN_3_TX,    
-    SI_FN_3_RX    => SI_FN_3_RX,    
+    SI_FN_0_TX    => OPEN,    
+    SI_FN_0_RX    => (OTHERS => '0'),    
+    SI_FN_1_TX    => OPEN,    
+    SI_FN_1_RX    => (OTHERS => '0'),    
+    SI_FN_2_TX    => OPEN,    
+    SI_FN_2_RX    => (OTHERS => '0'),    
+    SI_FN_3_TX    => OPEN,    
+    SI_FN_3_RX    => (OTHERS => '0'),    
                                    
-    SI_FN_0_CNTRL => SI_FN_0_CNTRL, 
-    SI_FN_1_CNTRL => SI_FN_1_CNTRL, 
-    SI_FN_2_CNTRL => SI_FN_2_CNTRL, 
-    SI_FN_3_CNTRL => SI_FN_3_CNTRL, 
-    SI_FN_RSTN    => SI_FN_RSTN    
+    SI_FN_0_CNTRL => OPEN, 
+    SI_FN_1_CNTRL => OPEN, 
+    SI_FN_2_CNTRL => OPEN, 
+    SI_FN_3_CNTRL => OPEN, 
+    SI_FN_RSTN    => OPEN    
   );
 END str;