Default assign dplink_siso_arr to avoid synthesis warning on latch on xon.

libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_v2.vhd

@@ -146,7 +146,7 @@ architecture str of ip_arria10_e1sg_jesd204b_v2 is
 
   signal rxlink_sosi_arr            : t_dp_sosi_arr(g_nof_streams - 1 downto 0) := (others => c_dp_sosi_rst);
   signal dplink_sosi_arr            : t_dp_sosi_arr(g_nof_streams - 1 downto 0);
-  signal dplink_siso_arr            : t_dp_siso_arr(g_nof_streams - 1 downto 0);
+  signal dplink_siso_arr            : t_dp_siso_arr(g_nof_streams - 1 downto 0) := (others => c_dp_siso_rdy);
   signal fifo_state                 : t_fifo_state_enum;
   signal fifo_rd_usedw              : std_logic_vector(ceil_log2(c_fifo_size) - 1 downto 0);
   signal fifo_filled                : std_logic := '0';

libraries/technology/ip_arria10_e2sg/jesd204b/ip_arria10_e2sg_jesd204b_v2.vhd

@@ -146,7 +146,7 @@ architecture str of ip_arria10_e2sg_jesd204b_v2 is
 
   signal rxlink_sosi_arr            : t_dp_sosi_arr(g_nof_streams - 1 downto 0) := (others => c_dp_sosi_rst);
   signal dplink_sosi_arr            : t_dp_sosi_arr(g_nof_streams - 1 downto 0);
-  signal dplink_siso_arr            : t_dp_siso_arr(g_nof_streams - 1 downto 0);
+  signal dplink_siso_arr            : t_dp_siso_arr(g_nof_streams - 1 downto 0) := (others => c_dp_siso_rdy);
   signal fifo_state                 : t_fifo_state_enum;
   signal fifo_rd_usedw              : std_logic_vector(ceil_log2(c_fifo_size) - 1 downto 0);
   signal fifo_filled                : std_logic := '0';