Added g_mm_rd_latency to support 1 or 2.

libraries/base/dp/src/vhdl/dp_block_from_mm.vhd

@@ -38,6 +38,7 @@ ENTITY dp_block_from_mm IS
     g_step_size          : NATURAL;
     g_nof_data           : NATURAL;
     g_data_w             : NATURAL := c_word_w;
+    g_mm_rd_latency      : NATURAL := 1;  -- default 1 from rd_en to rd_val, use 2 to ease timing closure
     g_reverse_word_order : BOOLEAN := FALSE
   ); 
   PORT (
@@ -71,8 +72,15 @@ ARCHITECTURE rtl OF dp_block_from_mm IS
 
   SIGNAL r     : t_reg;
   SIGNAL nxt_r : t_reg;
+
   SIGNAL mm_address      : NATURAL := 0;
   SIGNAL last_mm_address : NATURAL := 0;
+
+  SIGNAL r_sop_p  : STD_LOGIC;
+  SIGNAL r_eop_p  : STD_LOGIC;
+  SIGNAL out_sop  : STD_LOGIC;
+  SIGNAL out_eop  : STD_LOGIC;
+
 BEGIN
 
   last_mm_address <= g_step_size * (g_nof_data - 1) + g_data_size + start_address - 1;
@@ -80,13 +88,19 @@ BEGIN
   
   mm_mosi.address <= TO_MEM_ADDRESS(mm_address);
 
-  u_sosi : PROCESS(r, mm_miso)
+  -- Take care of g_mm_rd_latency for out_sosi.sop and out_sosi.eop
+  r_sop_p <= r.sop WHEN rising_edge(clk);
+  r_eop_p <= r.eop WHEN rising_edge(clk);
+  out_sop <= r.sop WHEN g_mm_rd_latency = 1 ELSE r_sop_p;
+  out_eop <= r.eop WHEN g_mm_rd_latency = 1 ELSE r_eop_p;
+
+  u_sosi : PROCESS(r, mm_miso, out_sop, out_eop)
   BEGIN
     out_sosi       <= c_dp_sosi_rst;  -- To avoid Modelsim warnings on conversion to integer from unused fields.
     out_sosi.data  <= RESIZE_DP_DATA(mm_miso.rddata(g_data_w-1 DOWNTO 0));
     out_sosi.valid <= mm_miso.rdval;  -- read latency from mm_mosi.rd to mm_miso.rdval is 1, so same as the ready latency (RL = 1)
-    out_sosi.sop   <= r.sop;          -- read latency from mm_mosi.rd to mm_miso.rdval is 1, so r.sop can be used for output sop
-    out_sosi.eop   <= r.eop;          -- read latency from mm_mosi.rd to mm_miso.rdval is 1, so r.eop can be used for output eop
+    out_sosi.sop   <= out_sop;        -- read latency from mm_mosi.rd to mm_miso.rdval is 1, so r.sop can be used for output sop
+    out_sosi.eop   <= out_eop;        -- read latency from mm_mosi.rd to mm_miso.rdval is 1, so r.eop can be used for output eop
   END PROCESS;
 
   mm_done <= r.eop;