ip_arria10 -> ip_arria10_e3sge3

libraries/technology/ip_arria10_e3sge3/tse_sgmii_lvds/compile_ip.tcl

@@ -26,7 +26,7 @@
 # - hdllib.cfg: add this compile_ip.tcl to the modelsim_compile_ip_files key in the hdllib.cfg
 # - hdllib.cfg: the values for modelsim_search_libraries key in the hdllib.cfg follow from altera libraries vmap section in the msim_setup.tcl
 
-set IP_DIR   "$env(RADIOHDL)/libraries/technology/ip_arria10/tse_sgmii_lvds/generated/sim"
+set IP_DIR   "$env(RADIOHDL)/libraries/technology/ip_arria10_e3sge3/tse_sgmii_lvds/generated/sim"
 
 #vlib ./work/         ;# Assume library work already exists
 

libraries/technology/ip_arria10_e3sge3/tse_sgmii_lvds/hdllib.cfg

@@ -12,7 +12,7 @@ test_bench_files =
 
 [modelsim_project_file]
 modelsim_compile_ip_files =
-    $RADIOHDL/libraries/technology/ip_arria10/tse_sgmii_lvds/compile_ip.tcl
+    $RADIOHDL/libraries/technology/ip_arria10_e3sge3/tse_sgmii_lvds/compile_ip.tcl
 
 
 [quartus_project_file]