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Commit 6ea0e8d5 authored by Eric Kooistra's avatar Eric Kooistra
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Use proc_common_stop_simulation() with g_tb_index.

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...@@ -399,11 +399,11 @@ begin ...@@ -399,11 +399,11 @@ begin
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
-- System setup -- System setup
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
tb_clk <= not tb_clk after c_tb_clk_period / 2; -- Testbench MM clock tb_clk <= not tb_clk and not i_tb_end after c_tb_clk_period / 2; -- Testbench MM clock
ext_clk <= not ext_clk after c_ext_clk_period / 2; -- External clock (200 MHz) ext_clk <= not ext_clk and not i_tb_end after c_ext_clk_period / 2; -- External clock (200 MHz)
eth_clk(0) <= not eth_clk(0) after c_eth_clk_period / 2; -- Ethernet ref clock (125 MHz) eth_clk(0) <= not eth_clk(0) and not i_tb_end after c_eth_clk_period / 2; -- Ethernet ref clock (125 MHz)
JESD204B_REFCLK <= not JESD204B_REFCLK after c_bck_ref_clk_period / 2; -- JESD sample clock (200MHz) JESD204B_REFCLK <= not JESD204B_REFCLK and not i_tb_end after c_bck_ref_clk_period / 2; -- JESD sample clock (200MHz)
SA_CLK <= not SA_CLK after c_sa_clk_period / 2; -- Serial Gigabit IO sa clock (644 MHz) SA_CLK <= not SA_CLK and not i_tb_end after c_sa_clk_period / 2; -- Serial Gigabit IO sa clock (644 MHz)
MB_I_REF_CLK <= ext_clk; -- DDR4 reference clock, same source as ext_clk (200 MHz) MB_I_REF_CLK <= ext_clk; -- DDR4 reference clock, same source as ext_clk (200 MHz)
dest_rst <= '0' after c_ext_clk_period * 10; dest_rst <= '0' after c_ext_clk_period * 10;
...@@ -848,7 +848,7 @@ begin ...@@ -848,7 +848,7 @@ begin
-- End simulation -- End simulation
--------------------------------------------------------------------------- ---------------------------------------------------------------------------
proc_common_wait_some_cycles(ext_clk, 100); -- delay for ease of view in Wave window proc_common_wait_some_cycles(ext_clk, 100); -- delay for ease of view in Wave window
proc_common_stop_simulation(g_tb_end, ext_clk, tb_almost_end, i_tb_end); proc_common_stop_simulation(g_tb_end, g_tb_index, 0, ext_clk, tb_almost_end, i_tb_end);
wait; wait;
end process; end process;
......
...@@ -35,6 +35,7 @@ use IEEE.numeric_std.all; ...@@ -35,6 +35,7 @@ use IEEE.numeric_std.all;
use std.textio.all; -- for boolean, integer file IO use std.textio.all; -- for boolean, integer file IO
use IEEE.std_logic_textio.all; -- for std_logic, std_logic_vector file IO use IEEE.std_logic_textio.all; -- for std_logic, std_logic_vector file IO
use work.common_pkg.all; use work.common_pkg.all;
use work.common_str_pkg.all;
package tb_common_pkg is package tb_common_pkg is
-- Constants -- Constants
...@@ -130,7 +131,14 @@ package tb_common_pkg is ...@@ -130,7 +131,14 @@ package tb_common_pkg is
procedure proc_common_stop_simulation(signal tb_end : in std_logic); procedure proc_common_stop_simulation(signal tb_end : in std_logic);
procedure proc_common_stop_simulation(constant g_tb_end : in boolean; procedure proc_common_stop_simulation(constant g_tb_end : in boolean;
constant g_latency : in natural; -- latency between tb_done and tb_)end constant g_tb_index : in integer; -- tb index for in report string
constant g_latency : in natural; -- latency between tb_done and tb_end
signal clk : in std_logic;
signal tb_done : in std_logic;
signal tb_end : out std_logic);
procedure proc_common_stop_simulation(constant g_tb_end : in boolean;
constant g_latency : in natural;
signal clk : in std_logic; signal clk : in std_logic;
signal tb_done : in std_logic; signal tb_done : in std_logic;
signal tb_end : out std_logic); signal tb_end : out std_logic);
...@@ -590,10 +598,13 @@ package body tb_common_pkg is ...@@ -590,10 +598,13 @@ package body tb_common_pkg is
end procedure; end procedure;
procedure proc_common_stop_simulation(constant g_tb_end : in boolean; procedure proc_common_stop_simulation(constant g_tb_end : in boolean;
constant g_tb_index : in integer;
constant g_latency : in natural; constant g_latency : in natural;
signal clk : in std_logic; signal clk : in std_logic;
signal tb_done : in std_logic; signal tb_done : in std_logic;
signal tb_end : out std_logic) is signal tb_end : out std_logic) is
-- Use g_tb_index = -1 < 0 to report no g_tb_index in report string.
constant c_tb_index_str : string := sel_a_b(g_tb_index >= 0, "-" & int_to_str(g_tb_index), "");
begin begin
-- Wait until simulation indicates done -- Wait until simulation indicates done
proc_common_wait_until_high(clk, tb_done); proc_common_wait_until_high(clk, tb_done);
...@@ -608,15 +619,24 @@ package body tb_common_pkg is ...@@ -608,15 +619,24 @@ package body tb_common_pkg is
-- stop the simulation using failure, without causing the test to fail. -- stop the simulation using failure, without causing the test to fail.
wait for 1 ns; wait for 1 ns;
if g_tb_end = false then if g_tb_end = false then
report "Tb Simulation finished." report "Tb" & c_tb_index_str & " Simulation finished."
severity NOTE; severity NOTE;
else else
report "Tb Simulation finished." report "Tb" & c_tb_index_str & " Simulation finished."
severity FAILURE; severity FAILURE;
end if; end if;
wait; wait;
end procedure; end procedure;
procedure proc_common_stop_simulation(constant g_tb_end : in boolean;
constant g_latency : in natural;
signal clk : in std_logic;
signal tb_done : in std_logic;
signal tb_end : out std_logic) is
begin
proc_common_stop_simulation(g_tb_end, -1, g_latency, clk, tb_done, tb_end);
end procedure;
procedure proc_common_stop_simulation(constant g_tb_end : in boolean; procedure proc_common_stop_simulation(constant g_tb_end : in boolean;
signal clk : in std_logic; signal clk : in std_logic;
signal tb_done : in std_logic; signal tb_done : in std_logic;
......
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