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RTSD
HDL
Commits
6e7c766c
Commit
6e7c766c
authored
3 years ago
by
Eric Kooistra
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Added tb_tb_dp_bsn_sync_scheduler.vhd
parent
73974f32
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!132
Renamed proc_dp_verify_sync_v2() into overloaded proc_dp_verify_sync() and...
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libraries/base/dp/hdllib.cfg
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-0
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libraries/base/dp/hdllib.cfg
libraries/base/dp/tb/vhdl/tb_tb_dp_bsn_sync_scheduler.vhd
+79
-0
79 additions, 0 deletions
libraries/base/dp/tb/vhdl/tb_tb_dp_bsn_sync_scheduler.vhd
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0 deletions
libraries/base/dp/hdllib.cfg
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6e7c766c
...
@@ -293,6 +293,7 @@ test_bench_files =
...
@@ -293,6 +293,7 @@ test_bench_files =
tb/vhdl/tb_tb_dp_block_validate_channel.vhd
tb/vhdl/tb_tb_dp_block_validate_channel.vhd
tb/vhdl/tb_tb_dp_bsn_align.vhd
tb/vhdl/tb_tb_dp_bsn_align.vhd
tb/vhdl/tb_tb_dp_bsn_source_v2.vhd
tb/vhdl/tb_tb_dp_bsn_source_v2.vhd
tb/vhdl/tb_tb_dp_bsn_sync_scheduler.vhd
tb/vhdl/tb_tb_dp_concat.vhd
tb/vhdl/tb_tb_dp_concat.vhd
tb/vhdl/tb_tb_dp_demux.vhd
tb/vhdl/tb_tb_dp_demux.vhd
tb/vhdl/tb_tb2_dp_demux.vhd
tb/vhdl/tb_tb2_dp_demux.vhd
...
...
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libraries/base/dp/tb/vhdl/tb_tb_dp_bsn_sync_scheduler.vhd
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6e7c766c
-------------------------------------------------------------------------------
--
-- Copyright (C) 2010
-- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
-- JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
-- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
--
-- This program is free software: you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation, either version 3 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program. If not, see <http://www.gnu.org/licenses/>.
--
-------------------------------------------------------------------------------
-- Author: Eric Kooistra
-- Purpose: Multi test bench for tb_dp_bsn_sync_scheduler.vhd
LIBRARY
IEEE
;
USE
IEEE
.
std_logic_1164
.
ALL
;
USE
work
.
tb_dp_pkg
.
ALL
;
-- > as 4
-- > run -all --> OK
ENTITY
tb_tb_dp_bsn_sync_scheduler
IS
END
tb_tb_dp_bsn_sync_scheduler
;
ARCHITECTURE
tb
OF
tb_tb_dp_bsn_sync_scheduler
IS
SIGNAL
tb_end
:
STD_LOGIC
:
=
'0'
;
-- declare tb_end to avoid 'No objects found' error on 'when -label tb_end'
-- Use g_block_size < c_nof_input_sync, because the fractional sync pattern
-- will repeat within g_block_size number of sync intervals
CONSTANT
c_nof_input_sync
:
NATURAL
:
=
25
;
BEGIN
-- from tb_dp_bsn_scheduler.vhd
--
-- -- Input sync period and sosi ctrl
-- g_nof_input_sync : NATURAL := 10;
-- g_nof_block_per_input_sync : NATURAL := 17;
-- g_block_size : NATURAL := 10;
-- g_input_gap_size : NATURAL := 3;
--
-- -- Output sync period
-- g_nof_samples_per_output_sync : NATURAL := 45; -- = g_block_size * 9 / 2
-- Note:
-- * Use g_nof_input_sync > g_block_size, because the fractional sync pattern
-- will repeat within g_block_size number of g_pps_interval's
u_output_is_input
:
ENTITY
work
.
tb_dp_bsn_sync_scheduler
GENERIC
MAP
(
c_nof_input_sync
,
17
,
10
,
3
,
170
);
-- 170/10 = 17 block/sync, = in_sosi
u_output_is_input_no_gaps
:
ENTITY
work
.
tb_dp_bsn_sync_scheduler
GENERIC
MAP
(
c_nof_input_sync
,
17
,
5
,
0
,
85
);
-- 85/5 = 17 block/sync, = in_sosi
u_sync_interval_0_5x
:
ENTITY
work
.
tb_dp_bsn_sync_scheduler
GENERIC
MAP
(
c_nof_input_sync
,
17
,
10
,
3
,
85
);
-- 85/10 = 8.5 block/sync, factor 85/170 = 0.5,
u_sync_interval_1_5x
:
ENTITY
work
.
tb_dp_bsn_sync_scheduler
GENERIC
MAP
(
c_nof_input_sync
,
17
,
10
,
3
,
255
);
-- 255/10 = 25.5 block/sync, factor 255/170 = 1.5,
u_sync_interval_prime_251
:
ENTITY
work
.
tb_dp_bsn_sync_scheduler
GENERIC
MAP
(
c_nof_input_sync
,
17
,
10
,
3
,
251
);
-- 251.10 = 25.1 block/sync, 251 is a prime
u_short_block_4_3_15
:
ENTITY
work
.
tb_dp_bsn_sync_scheduler
GENERIC
MAP
(
c_nof_input_sync
,
4
,
3
,
3
,
15
);
-- 15/3 = 5 block/sync,
u_short_block_5_3_16
:
ENTITY
work
.
tb_dp_bsn_sync_scheduler
GENERIC
MAP
(
c_nof_input_sync
,
5
,
3
,
3
,
16
);
-- 16/3 = 5.33 block/sync,
u_short_block_6_3_17
:
ENTITY
work
.
tb_dp_bsn_sync_scheduler
GENERIC
MAP
(
c_nof_input_sync
,
6
,
3
,
3
,
17
);
-- 17/3 = 5.66 block/sync,
-- TODO: dp_bsn_sync_scheduler works for g_block_size = 2, but expected_out_enable in tb_dp_bsn_sync_scheduler only works for g_block_size > 2
-- u_short_block_no_gaps : ENTITY work.tb_dp_bsn_sync_scheduler GENERIC MAP (c_nof_input_sync, 7, 2, 0, 16); -- 16/2 = 8 block/sync,
u_fraction_half
:
ENTITY
work
.
tb_dp_bsn_sync_scheduler
GENERIC
MAP
(
c_nof_input_sync
,
17
,
10
,
3
,
45
);
-- 45/10 = 4.5 block/sync
u_fraction_0
:
ENTITY
work
.
tb_dp_bsn_sync_scheduler
GENERIC
MAP
(
c_nof_input_sync
,
17
,
10
,
3
,
50
);
-- 50/10 = 5 block / sync
END
tb
;
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