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Commit 6a64fd79 authored by Reinier van der Walle's avatar Reinier van der Walle
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corrected hdllib + pinning

parent e4f47739
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1 merge request!295Resolve L2SDP-850
Pipeline #40283 passed
Stage: simulation
Stage: synthesis
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boards/uniboard2c/designs/unb2c_test/revisions/unb2c_test_ddr_16G/hdllib.cfg
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− 1
View file @ 6a64fd79
...@@ -6,7 +6,8 @@ hdl_lib_technology = ip_arria10_e2sg ...@@ -6,7 +6,8 @@ hdl_lib_technology = ip_arria10_e2sg
hdl_lib_include_ip = hdl_lib_include_ip =
# Comment all IP that is not used in this design # Comment all IP that is not used in this design
# DDR memory # DDR memory
ip_arria10_e2sg_ddr4_8g_1600 ip_arria10_e2sg_ddr4_16g_1600_64b
ip_arria10_e2sg_ddr4_16g_1600_72b
synth_files = synth_files =
unb2c_test_ddr_16G.vhd unb2c_test_ddr_16G.vhd
......
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