Added tb_tb_diag_block_gen.vhd and added it to the regression test.

libraries/base/diag/tb/vhdl/tb_tb_diag_block_gen.vhd

+-------------------------------------------------------------------------------
+--
+-- Copyright (C) 2018
+-- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+-- JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
+-- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+--
+-- This program is free software: you can redistribute it and/or modify
+-- it under the terms of the GNU General Public License as published by
+-- the Free Software Foundation, either version 3 of the License, or
+-- (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+-- GNU General Public License for more details.
+--
+-- You should have received a copy of the GNU General Public License
+-- along with this program.  If not, see <http://www.gnu.org/licenses/>.
+--
+-------------------------------------------------------------------------------
+
+-- Author: Eric Kooistra
+-- Purpose: Multi-testbench for diag_block_gen
+-- Description:
+--   Verify diag_block_gen
+-- Usage:
+--   > as 4
+--   > run -all
+
+LIBRARY IEEE, dp_lib;
+USE IEEE.std_logic_1164.ALL;
+USE dp_lib.tb_dp_pkg.ALL;
+
+ENTITY tb_tb_diag_block_gen IS
+END tb_tb_diag_block_gen;
+
+
+ARCHITECTURE tb OF tb_tb_diag_block_gen IS
+  
+  SIGNAL tb_end : STD_LOGIC := '0';  -- declare tb_end to avoid 'No objects found' error on 'when -label tb_end'
+  
+BEGIN
+
+  -- -- general
+  -- g_flow_control_verify    : t_dp_flow_control_enum := e_active;  -- always active, random or pulse flow control
+  -- -- specific
+  -- g_buf_adr_w      : NATURAL := 7;   -- Waveform buffer address width (requires corresponding c_buf_file)
+  -- g_buf_dat_w      : NATURAL := 32   -- Waveform buffer stored data width (requires corresponding c_buf_file)
+  -- g_try_phasor     : BOOLEAN := FALSE  -- use TRUE to see BG phasor in wave window with out_sosi.re/im in radix 
+                                          -- decimal and analogue format, no self test
+
+  u_bg         : ENTITY work.tb_diag_block_gen GENERIC MAP (e_active,  7, 32, FALSE);
+  u_bg_ready   : ENTITY work.tb_diag_block_gen GENERIC MAP (e_random,  7, 32, FALSE);
+  
+END tb;